Design & Reuse
8400 IP
251
80.0
xSPI NOR Flash controller
xSPI-NFC is JEDEC xSPI compliant NOR Flash controller IP supporting devices from various vendors with XIP and Auto-boot support. The IP also has Conti...
252
20.0
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 4.0 IP suppo...
253
20.0
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...
254
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
255
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
256
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
257
20.0
High Bandwidth In-Order RISC-V CPU IP Core
...
258
20.0
MIPI C-PHY/D-PHY Combo(5nm, 7nm, 12/16nm, 28nm, 40nm, 55nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
259
20.0
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm)
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...
260
20.0
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....
261
75.0
MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
The Arasan MIPI CSI-2 Transmitter IP Core functions as a MIPI Camera Serial Interface between a peripheral device (display module) and a host processo...
262
75.0
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it. New applications are emerging and...
263
75.0
ONFI 4.2 PHY
Open NAND Flash Interface (ONFI) for NAND Flash Memory chips is an open standard. Arasan’s ONFI 4.2 PHY IP is designed to connect seamlessly with thei...
264
75.0
CXL 2.0 Agilex FPGA Acclerator Card
Mobiveil’s CXL-Aglx Accelerator platform is a PCIe® Gen5 add-in card with latest Intel’s Agilex I series FPGA. It supports High-Performance Applicatio...
265
15.5556
SMD RISC-V SDK
Quickly and seamlessly develop, debug and fine-tune applications for Semidynamics RISC-V hardware with the SMD RISC-V SDK. It is a complete software d...
266
15.5556
Avispado 222 - High Bandwidth RISC-V IP Core
...
267
15.0
GDDR6X, GDDR6 Combo PHY & Controller
The INNOSILICON™ GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20 Gbps per pin for PAM2 GDDR6 mode ...
268
70.0
40G UCIe PHY IP on Samsung SF4X
Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...
269
70.0
CAN CC, CAN FD, and CAN XL Bus Controller
The CAN-CTRL implements a highly featured and reliable CAN bus controller that performs serial communication according to the Controller Area Network ...
270
70.0
WAVE6010, H.265, HEVC, H.264, AVC, video decoder IP for 4K and 8K New!
WAVE6010 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@500MHz r...
271
70.0
WAVE6031, AV1, H.265, HEVC, H.264, AVC, VP9 video decoder IP for 4K and 8K New!
WAVE6031 is a 4K/8K multi-standard video decoder HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 8K30fps/4K1...
272
70.0
WAVE6100, H.265, HEVC, H.264, AVC, video encoder IP for 4K and 8K New!
WAVE6100 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
273
70.0
WAVE6110, H.265, HEVC, H.264, AVC, video codec IP for 4K and 8K New!
WAVE6110 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
274
70.0
Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...
275
11.0
Power and Ground BondPads that include CC-100IP Digital and Switching Circuit Power Reduction Technology, Featuring 20% to 40% Total Dynamic Power Reduction
All electronic systems that use CMOS digital circuits generate EM noise and currents (overlap current) as an undesired byproduct of their function. T...
276
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
277
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
278
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
279
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
280
10.0
64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process
The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...
281
10.0
64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...
282
10.0
256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process
The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...
283
10.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
284
10.0
16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process
The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...
285
10.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY (in production)...
286
10.0
Gigabit Ethernet PHY (Modification Right)
Gigabit Ethernet PHY Modification Right (in production)...
287
10.0
RISC-V Vector Unit
A Vector Unit is composed of several 'vector cores', roughly equivalent to a GPU core, that perform multiple calculations in parallel. Each vector cor...
288
10.0
4Kx16 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process
The AT4K16U110MAE0DA is organized as a 4K-bits by 16 one-time programmable memory. This is a kind of non-volatile memory fabricated in UM- L110AE proc...
289
10.0
4Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40nm ULP 1.1V/2.5V Process
The AT4K32T40ULP7ZC is organized as 4K-bits by 32 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP stand...
290
10.0
4Kx8 Bits OTP (One-Time Programmable) IP, GLOBA-FOUNDR---® 22nm FDX 0.8V/1.8V Process
The AT4K8G22FDX0AA is organized as a 4K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in GLOBA-FOUNDR---® ...
291
10.0
8Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The AT8K8V150BCD0DB is organized as an 8K-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 0.15μm BCD GII...
292
10.0
UniPro 1.6 Host/Device IP
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
293
10.0
UniPro 1.8 Host/Device IP
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
294
10.0
UniPro 1.8 Host/Device IP
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
295
10.0
UniPro Controller 2.0 IP (host / device)
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
296
10.0
USB 3.2 Gen2/Gen1 PHY IP in TSMC(3nm, 5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm)
M31 USB 3.2 Gen2 (support x1/x2) transceiver IP provides a complete range of USB 3.2 Gen2 host and peripheral applications up to 10x2Gbps. It is compl...
297
10.0
1x64 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 22nmFDX 0.8V/1.8V Process
The AT1X64G22FDX0AA is organized as a 1 by 64 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in Globa-Foundr--- 22nm FD...
298
60.0
WAVE637DV, AV1, H.265, HEVC, H.264, AVC, VP9 video codec IP for 4K
WAVE637DV is a 4K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 4K60fps@500MHz ...
299
60.0
MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm
The I3C bus (incl. PHY) is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and vario...
300
60.0
Modern Audio DSP, designed for battery operated, high-performance, audio and voice applications
Ceva-BX1 inherent low power design and compact code size make it ideal for a broad range of advanced audio/voice applications, requiring signal proces...