Design & Reuse
8404 IP
2551
0.118
UMC 80nm LL/eHV Process synchronous Via ROM memory compiler
UMC 80nm LL/eHV Process synchronous Via ROM memory compiler...
2552
0.118
UMC 90nm LL-RVT (Low-K) Process with 3.3V device analog esd IO group (with BOAC)
UMC 90nm LL-RVT (Low-K) Process with 3.3V device analog esd IO group (with BOAC)...
2553
0.118
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC BOAC Pad
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC BOAC Pad...
2554
0.118
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC pad
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC pad...
2555
0.118
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2556
0.118
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2557
0.118
UMC 90nm LL/RVT MPCA core cell library
UMC 90nm LL/RVT MPCA core cell library...
2558
0.118
UMC 90nm LL/RVT process MULTI-VOLTAGE GENERIC I/O CELL USING 3.3V GOX52 IO
UMC 90nm LL/RVT process MULTI-VOLTAGE GENERIC I/O CELL USING 3.3V GOX52 IO...
2559
0.118
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library.
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library....
2560
0.118
UMC 90nm SP RVT process SSTL18 IO cell library
UMC 90nm SP RVT process SSTL18 IO cell library...
2561
0.118
UMC 90nm SP-HVT LowK Logic Process High Speed PowerSlash Kit
UMC 90nm SP-HVT LowK Logic Process High Speed PowerSlash Kit...
2562
0.118
UMC 90nm SP-RVT LowK Logic Process High Speed PowerSlash Kit
UMC 90nm SP-RVT LowK Logic Process High Speed PowerSlash Kit...
2563
0.118
UMC 90nm SP/RVT Low-K process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm SP/RVT Low-K process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2564
0.118
UMC 90nm SP/RVT LowK Logic Process ECO M1 core cell library
UMC 90nm SP/RVT LowK Logic Process ECO M1 core cell library...
2565
0.118
UMC 90nm SP/RVT process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO
UMC 90nm SP/RVT process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO...
2566
0.118
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 90nm SPLVT ultra-high speed 1-port SRAM...
2567
0.118
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler...
2568
0.118
CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process
CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process...
2569
0.118
An 8-bit 10MSPS Programmable Gain Amplifier ;UMC 55nm SP-HVT LowK Logic Process
An 8-bit 10MSPS Programmable Gain Amplifier ;UMC 55nm SP-HVT LowK Logic Process...
2570
0.118
An ADDLL operate at 50MHz~210MHz. Supports slave delay line to generate per 1/32 UI programmable delay UMC 40nm LP/RVT Logic Process.
An ADDLL operate at 50MHz~210MHz. Supports slave delay line to generate per 1/32 UI programmable delay UMC 40nm LP/RVT Logic Process....
2571
0.118
Analog Comparator; 0.25um Logic process
Analog Comparator; 0.25um Logic process...
2572
0.118
Analog Front End IP for CMOS image processing applications
FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enab...
2573
0.118
Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process.
Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....
2574
0.118
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process...
2575
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), Support retention and deep sleep modes with built-in power gating circuitry., UMC 55nm LP process
UMC 55um LP Low-K process One Port Register File compiler....
2576
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), UMC 55nm LP process
UMC 55nm LP Logic process 0.425um2-Bit cell One Port Register File memory compiler....
2577
0.118
One Port Register File Compiler IP, HJTC 0.18um pFlash process
HJTC 0.18um pFlash process synchronous Single Port Register File memory compiler....
2578
0.118
One Port Register File Compiler IP, UMC 0.11um CIS process
UMC 0.11um CMOS Image Sensor 2P3M process synchronous high density Single Port Register File SRAM memory compiler....
2579
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process 1.41um2 cell One Port Register File memory compiler....
2580
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um AE eFlash HS process for One Port Register File compiler....
2581
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
2582
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, One Port Register File memory compiler....
2583
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Single Port Register File memory compiler....
2584
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash process One Port Register File....
2585
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler....
2586
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process 1.41um2 cell Single Port Register File (One Port Register File) memory compiler....
2587
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process standard asynchronous high density Single Port Register File SRAM memory compiler....
2588
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous One Port Register File memory compiler with 1.41um2-Bit cell....
2589
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
2590
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 130nm CMOS Image SensorCu process One Port Register File compiler....
2591
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 0.13um 2P4M 1.5V CMOS Image Sensor process synchronous Single Port Register File SRAM compiler....
2592
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous Single Port Register File SRAM memory compiler....
2593
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process synchronous Single Port Register File SRAM memory compiler....
2594
0.118
One Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Single Port Register File SRAM memory compiler....
2595
0.118
One Port Register File Compiler IP, UMC 0.13um SP process
UMC 0.13-micron 1.2V high speed (HS) Logic process synchronous Low Power Single Port Register File SRAM compiler....
2596
0.118
One Port Register File Compiler IP, UMC 0.13um SP/FSG process
UMC 0.13um SP/FSG Logic process high density synchronous Single Port Register File SRAM memory compiler....
2597
0.118
One Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous high density Single Port Register File SRAM memory compiler....
2598
0.118
One Port Register File Compiler IP, UMC 0.15um SP process
UMC 0.15um SP Logic process synchronous Single Port Register File SRAM memory compiler....
2599
0.118
One Port Register File Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port Register File SRAM memory compiler....
2600
0.118
One Port Register File Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous Single Port Register File SRAM memory compiler....