Design & Reuse
9 IP
1
0.0
AHB Scatter-Gather DMA Controller
The eSi-SG-DMA core can be used to implement 1D and 2D memory-to-memory, memory-to-peripheral, peripheral-to-memory and peripheral-to-peripheral data ...
2
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High-performance 32-bit RISC CPU
The eSi-3250 32-bit CPU is targeted specifically for applications with high performance requiring caching, due to the use of slow on-chip memories suc...
3
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Compact, low-power 32-bit RISC CPU
The eSi-3200 32-bit CPU is the mid-range member in the eSi-RISC family of processor cores. It is targeted specifically for low-power applications that...
4
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Low-cost & low-power 16-bit RISC CPU
eSi-RISC s eSi-1600 16-bit RISC CPU IP core is an extremely small, low-cost and low-power processor ideal for integration into ASIC and/or FPGA design...
5
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Low-power, 16-bit RISC CPU with cache
The eSi-1650 16-bit CPU with instruction cache is targeted specifically for low-power applications, where typically an 8-bit CPU may have previously b...
6
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APB I2C master and slave
The eSi-I2C core implements the I2C two-wire protocol. It supports operation as both an I2C master and slave. The I2C is supplied with an AMBA APB sla...
7
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APB SPI (Serial Peripheral Interface) master and slave
The eSi-SPI core is a Serial Peripheral Interface that can be used to implement full-duplex, synchronous, serial communications between ICs. The eSi-S...
8
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APB UART with optional ISO7816-3
The eSi-UART core can be used to implement asynchronous serial communications. It is ideally suited for implementing RS232 or ISO7816-3 for smartcard ...
9
0.0
TSMC embedded flash controller
The eSi-TSMC-Flash IP core provides an AMBA 3 AHB-lite interface to TSMC's embedded flash macros....