Design & Reuse
3729 IP
1651
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
high density Single Port SRAM, UMC 28nm HLP process....
1652
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler....
1653
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler....
1654
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process standard LVT synchronous high density Single Port SRAM memory compiler....
1655
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler....
1656
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process LVT synchronous high density Single Port SRAM memory compiler....
1657
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP synchronous high density Single Port SRAM memory compiler....
1658
0.118
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler....
1659
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
ULL Single Port SRAM, UMC 40nm LP process....
1660
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with peripheral LVT and Power Gating....
1661
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303HVT cell peripheral LVT....
1662
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with Power Gating & row redundancy....
1663
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
ULL Single Port SRAM with row redundancy, UMC 40nm LP process....
1664
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/HVT Logic process with 6TSRAM (0.242 mm2) Single Port SRAM memory compiler....
1665
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler with LVT peripheral....
1666
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT....
1667
0.118
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT....
1668
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Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM compiler with Power Gating /HVT....
1669
0.118
Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM with row redundancy/HVT/Power Gating....
1670
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Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler....
1671
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Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT....
1672
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler....
1673
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process ULL Singal-Port SRAM compiler....
1674
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Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature....
1675
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Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler....
1676
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
1677
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler....
1678
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler....
1679
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler....
1680
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler....
1681
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM....
1682
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler....
1683
0.118
Single Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler....
1684
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler....
1685
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....
1686
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Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler....
1687
0.118
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler....
1688
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler....
1689
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....
1690
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler....
1691
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
1692
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....
1693
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....
1694
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....
1695
0.118
Cipher coprocess for encryption/decryption of DES/Triple-DES/AES algorithm.
Cipher coprocess for encryption/decryption of DES/Triple-DES/AES algorithm....
1696
0.118
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller....
1697
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MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI Transmitter Controller....
1698
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MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller....
1699
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MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller....
1700
0.118
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process...