Design & Reuse
3730 IP
2001
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
2002
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...
2003
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
2004
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
2005
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
2006
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
2007
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
2008
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
2009
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
2010
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
2011
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
2012
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
2013
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
2014
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
2015
0.118
UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES
UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES...
2016
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
2017
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
2018
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...
2019
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
2020
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...
2021
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
2022
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
2023
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
2024
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
2025
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
2026
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
2027
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
2028
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
2029
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
2030
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
2031
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library...
2032
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
2033
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)...
2034
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
2035
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...
2036
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
2037
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
2038
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
2039
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
2040
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
2041
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
2042
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
2043
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
2044
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
2045
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
2046
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
2047
0.118
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler...
2048
0.118
UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair
UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair...
2049
0.118
UMC 28nm HPM ultra high speed register compiler
UMC 28nm HPM ultra high speed register compiler...
2050
0.118
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library...