Design & Reuse

PLL (Frequency Synthesizer) IP, Input: 25MHz - 33.33MHz, Output: 600MHz/800MHz, 400MHz/533MHz, 200MHz/266MHz, UMC 65nm SP process

Input 25-33.33MHz, output 600MHz/800MHz, 400MHz/533MHz, 200MHz/266MHz frequency synthesizable PLL, UMC 65nm SP/RVT Low-K Logic process....