Design & Reuse

Power on Reset IP, Input: 1.5V - 3.9V, UMC 55nm SP process

3.9~1.5V (RTC Core Cell Library operating voltage+), Rise-relax voltage (Vrr), min. 1.6V (1.6V~2.3V) Power On Reset, UMC 55nm SP/RVT Low-K Logic proce...