Design & Reuse

Power on Reset IP, Input: 1.0V/3.3V, UMC 40nm LP process

Vrr=2.33V Vfr=2.26V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request, UMC 40nm LP/RVT Low-K Logic process....