Design & Reuse

PLL (Frequency Synthesizer) IP, Input: 200MHz - 800MHz, Output: 200MHz - 400MHz, 400MHz - 800MHz, 800MHz - 1600MHz, UMC 28nm HPM process

Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output frequency synthesizable PLL, UMC 28nm HPM Logic proce...