Design & Reuse
Catalog of SIP Cores
System on Chip design resources

2 Port High-Density Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option

2 Port High-Density Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...