Design & Reuse
Catalog of SIP Cores
Silicon on Chip design resources

SATA 3 Host Controller on Xilinx Artix 7

The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS_SATA3_HO...