Design & Reuse
Catalog of SIP Cores
System on Chip design resources

UCIe 2.0 Subsystem for Standard Package (8nm) 8LPU (PHY + Adapter + Protocol Mapper)

Controller Overview: UCIe v2.0 controller implements the D2D Adapter defined in the UCIe 2.0 specification, as well as AXI4-to-Flit protocol conversi...