Design & Reuse
Catalog of SIP Cores
System on Chip design resources

PCIe 6.0/5.0 PHY in 8nm, 5nm, 4nm (8LPU, SF5A, SF4X)

The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 and 5.0 specification. This IP offers a cost-effective and low-...