Design & Reuse
Catalog of SIP Cores
System on Chip design resources

Nuclei N600(SMP): 32-bit high-efficiency 6-stage-pipeline processor with DSP/FPU capable for embedded and real-time applications

32-bit high-efficiency multi-core processor without MMU, comparable to ARM Cortex-R4/R5, based on the Nuclei 600 Series architecture, supporting 2–4 c...