Design & Reuse
Catalog of SIP Cores
System on Chip design resources

Nuclei NS100: 32-bit ultra-low-power 2-stage-pipeline secure processor for EAL 5+ secure embedded applications

32-bit ultra-low-power RISC-V core, designed for ultra-low-power MCU, IoT and other low-power applications. A competitive rival to ARM SC000, with mi...