[Shanghai China, March 15, 2005]
VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading ASIC design foundry targeted at China based wafer foundries, announced today the release of VeriSilicon's Standard Design Platform for HeJian Technology (Suzhou) Co., Ltd. (HJTC) 0.18 and 0.25 micron CMOS process technologies. The Standard Design Platform includes standard cell library, I/O cell library and memory compilers for single port and dual port SRAM, two port register file, and diffusion programmable ROM.
The Standard Design Platform was optimized specifically for HJTC's 0.18 and 0.25 micron process technology and characterized using the latest electrical models. The design platform supports industry-leading EDA tools from Cadence Design Systems, Inc., Magma Design Automation, Inc., Mentor Graphics Corporate, and Synopsys, Inc. It is available to support all HJTC’s customers with no charge.
“Through close corporation with HJTC’s team, we delivered both sets of the standard design platforms, one for HJTC’s 0.25um process and another for HJTC’s 0.18um process, in a relatively short period of time,” said Dr. Wayne Dai, President and CEO of VeriSilicon. " During this project, HJTC has demonstrate effective and efficient execution and superior quality control.”
“We have been working closely with VeriSilicon and are very impressed by their technical strength.”, said Terry Tsao, VP of marketing and sales division of HJTC, “The Standard Design Platform including cell libraries, memory compilers, and semiconductor IPs. The platform has superior timing performance, low power consumption and high area density. In addition, VeriSilicon’s SoC design capability will allow our business to grow significantly by attracting many new design projects.”About VeriSilicon
VeriSilicon Holdings Co., Ltd., a leading ASIC design foundry focusing on providing IP, design services and turnkey service including manufacturing, packaging, testing, and delivery for our customers. VeriSilicon has operation centers in Shanghai China, Taiwan and Silicon Valley US to service worldwide customers. VeriSilicon offers Standard Design Platforms including standard cell libraries, IO cell libraries, memory compilers for China based wafer foundries such as HeJian Technology (Suzhou) Co., Ltd. (HJTC), Semiconductor Manufacturing International (Shanghai) Corporation (SMIC), Grace Semiconductor Manufacturing Corporation (GSMC), Advanced Semiconductor Manufacturing Corporation of Shanghai (ASMC) and Shanghai Hua Hong NEC Electronics Co., Ltd (HHNEC) covering 0.13ìm, 0.15ìm, 0.18ìm, 0.25ìm, 0.35ìm,, and 0.6ìm process technologies. Close to 300 customers worldwide have downloaded VeriSilicon’s SDPs for their designs and many complex, multi-million gates SoCs have achieved first silicon success and started volume production. VeriSilicon is the first and only ARM approved design center (ATAP) in mainland China. For more information, please visit http://www.verisilicon.com
Located in the beautiful historical city of Suzhou, Hejian Technology (Suzhou) Co. Ltd, takes 1.3 square kilometers in the modernized Suzhou Industrial Park. Being one of the leading Foundry service enterprise, Hejian is geared with an excellent management team along with state-of-art IC technology as to provide comprehensive and competitive service to her customer.
Hejian setup its first foundry fab with an investment of over 1.5 billion USD in Nov. of 2001. Bringing along with numerous companies in the IC industry supply chain which foster the clusters effect as to accomplish the first step of Hejian's China business master plan.
With the first pcs of 200mm wafer Pilot Wafer Start on May, 2003, Hejian set 60000 pcs wafer out per month as the first fab's capacity. Currently, 0.25 um and 0.18 um process technology have gone mass production with world class competitive yield.
Hejian plans to setup multiple foundry fab in 10 years with a total investment exceed 10 billion USD as to fulfill her goal of being China's IC industry leader. For more information, please visit http://www.hjtc.com.cn