| SAN FRANCISCO, Calif. — Citing an ominous warning for EDA vendors, Gary Smith, chief EDA analyst at Gartner Dataquest, said at the International Symposium on Physical Design (ISPD) here that design teams are increasingly developing their own EDA tools in-house. |
Smith said that 27 percent of engineers were using in-house tools in 2004, up from 9 percent in 1997. This figure rose to 28 percent in 2000 and then dropped, only to start rising again in 2002. "This is a very bad sign for the EDA industry," he said.
The problem with 2000, and today, is that EDA vendors aren't keeping up with new process technologies, Smith said. "OEMs would rather buy tools from commercial EDA companies, but when the tools don't exist, they build them in house," he said.
"The tools that are in the market today are 130 and 90 nm tools," Smith said. "What should be in the market are 65 and 45 nm tools. The problem since 2000 is that we haven't been getting tools out in time."
Smith said that Dataquest hasn't finalized its EDA revenue growth figure for 2004, but expects it to be around 1 percent. But internal CAD groups increased their spending 9 to 12 percent, he said.
Smith said that the 1990's were the "creampuff era" of semiconductors. Plain old vanilla CMOS was king, process improvements were incremental, and the RTL design methodology served the entire decade. But at 130 nm, yields fell. This led to a crisis in the customer-owned tooling (COT) market.
The design flow was modified, Smith said, so that GDSII files were handed off to an IC layout group whose job it is to re-engineer the layout and fix manufacturing issues. Today this is one of the fastest-growing engineering segments, even as the number of ASIC design engineers is declining sharply.
What's going on, said Smith, is a "competitive re-aggregation" of the electronics industry. He said that the mask shop is moving back in-house, ASIC vendors are doing a majority of IC layout in-house again, mainstream OEMs are getting away from layout, and IDMs or foundries may start buying design for manufacturability (DFM) startups.
"The fabless guys who used to do COT are finding out they're really in trouble now," said Smith, who noted that fabless vendors can't get the money they need to design chips and can't get good yields.
Asked why the major EDA vendors are falling behind, Smith said each has their own problems. He said Magma Design Automation, which Smith said Cadence Design Systems is still recovering from the Tality design services "disaster" and that its main customer base is mainstream users, not power users. "Synopsys went conservative on us," Smith said. "They've been the biggest disappointment. They're shooting for where the puck is, not where the puck will be."
But there's still hope for a "new era of CAD," Smith said. "If the EDA industry provides tools on time, it will continue to be a growing market," he said. "If not, the tools will increasingly be built in-house by semiconductor vendors."