Synplicity’s Synplify DSP Software Bridges DSP Algorithm to FPGA Implementation; Performs DSP Synthesis and RTL Code Generation in Simulink
SUNNYVALE, Calif., January 31, 2004 — Synplicity, Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, today unveiled enhancements to its Synplify® DSP software, a premiere DSP synthesis solution for implementing DSP designs in FPGAs. The enhancements include new DSP synthesis optimizations for performance and area, additional Blockset functionality, including support for saturation / rounding, and a customizable DSP block library, allowing designers to quickly add custom DSP IP to their library. The Synplify DSP software provides users of the Simulink® design environment from The MathWorks with the industry’s only technology-independent DSP synthesis path from Simulink to hardware, enabling designers to select their FPGA of choice for hardware implementation. Synplicity’s Synplify DSP software optimizes Simulink designs by quickly producing circuits that can deliver faster performance and smaller area than alternative DSP implementation tools.
“The Synplify DSP product is the only DSP synthesis solution available that truly separates the algorithm captured in Simulink from its actual implementation in hardware,” said Jeff Garrison, director of marketing, Synplicity. “As such, DSP algorithm designers don’t have to know details about the FPGA’s architecture, such as clocks, latency, logical structure and storage, to effectively use the software. The tool allows DSP designers to focus on the development and verification of the algorithm and then automatically produce clean, highly optimized RTL code for implementation.”
“Synplicity provides the only DSP synthesis tool that takes advantage of Simulink Fixed Point, which gives users access to the full power of the Simulink design and analysis tools,” said Ken Karnofsky, marketing director for signal processing and communications products at The MathWorks. “By leveraging the fixed point data types, data is automatically propagated through the Synplify DSP block set in Simulink without the need for designers to insert gateways into their Simulink design.”
Enhancements to the Synplicity Blockset, such as saturation and rounding, enable more efficient specification and area optimized implementation for applications that require this behavior. The improved system-level optimizations, which include re-timing for performance and folding for area efficiency, help produce better performing designs such as those containing FFT blocks.
Seamless Integration with Industry Leading Synplify Pro Software and The MathWorks Simulink Environment
Included in the Synplify DSP software is a set of functional blocks commonly used in DSP design, such as filtering (FIR, IIR), transforms, math functions, CORDIC, signal operations, memories and control logic. These technology-independent blocks are built upon The MathWorks’ fixed point data type and are tightly integrated into The MathWorks environment, allowing the algorithm designer to continue to use familiar Simulink capabilities such as discrete-time simulation, multi-rate management, fixed-point quantization and scope debugging.
Two Levels of Optimization Yield Performance
Synplify DSP has been optimized to work seamlessly with Synplicity’s newest version of Synplify Pro software (version 8.0). Using Synplify DSP and Synplify Pro tools together provides DSP designers with two levels of optimization – first the Synplify DSP software’s system level re-timing and folding is done in a technology independent way followed by the Synplify Pro software’s technology specific optimizations to give a highly optimized DSP design in the chosen FPGA.
Customized DSP IP
Synplicity’s unique capability to create custom DSP IP using a base Blockset within the Synplify DSP software has been added. By building customized IP with Synplicity’s Blockset, users can take full advantage of the system-level optimization engine within Synplify DSP. Optimizations such as re-timing, folding and multi-channelization allow area-speed tradeoffs to be performed automatically. With the Synplify DSP toolbox, users can generate high-quality RTL code and a test bench from Simulink specification.
Pricing and Availability
Pricing for the Synplify DSP software starts at $19,000 ( U.S.) for a one-year, time-based license as an add-on to the Synplify Pro software. For more information on the Synplify DSP software, visit Synplicity at http://www.synplicity.com or contact your local Synplicity representative.
Synplicity® Inc. (Nasdaq: SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity’s high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers. The company’s underlying Behavior Extracting Synthesis Technology® (BEST™ ), which is embedded in its logical, physical and verification tools, and has led to Synplicity’s top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company’s fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 280 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information visit http://www.synplicity.com.
This press release contains forward-looking statements including, but not limited to, statements regarding the function, performance and achievements of Synplicity’s Synplify DSP software. In some cases, you will be able to identify forward-looking statements by terminology such as “may,” “will,” “should,” “expects,” “believes” or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual achievements or performance of the Synplify DSP software to differ materially from the forward-looking statements, including the performance and quality of our software products relative to other comparable software, latent defects, design flaws or other problems with the Synplify DSP software and the growth and changing technical requirements in the programmable semiconductor market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K for the year ended December 31, 2003 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future functions, performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.
Synplicity, Synplify and Behavior Extracting Synthesis Technology are registered trademarks of Synplicity Inc. BEST is a trademark of Synplicity Inc. All other names mentioned herein are the trademarks or registered trademarks of their owners.