LEON3 has passed SPARC V8 compliance testing
The LEON3 is the more performant successor of the LEON2 processor capable of delivering 400 MIPS on a 0.13 um process. The successful compliance testing is yet another milestone in our continuous development of SPARC processors, says Jiri Gaisler, CTO and founder of Gaisler Research.
The SPARC (Scalable Processor Architecture) is the industry's only openly defined and evolved RISC architecture. Unlike other RISC (Reduced Instruction Set Computer) designs, SPARC specifies not a hardware implementation ("chip"), but an open, standard architecture belonging to the community of SPARC vendors and users. The SPARC specification is defined by the SPARC Architecture Committee, a technical arm of the computer-maker consortium, SPARC International.
About Gaisler Research AB
Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as Aerospace, Military and demanding Commercial applications. The Gaisler Research's products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive customer and application-specific SoC designs.
|
Cobham Gaisler AB Hot IP
Related News
- INSPECTOR diagnostic and debug platform passed the PCIe 4.0 compliance
- Cadence Accelerates Arm-Based Server Development by Automating Arm Pre-Silicon Bare Metal Compliance Testing
- Mobiveil's GPEX PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3-AXI PCI Express 3.0 IP with AMBA AXI Support Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3 PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
Breaking News
Most Popular
- TSMC to Kick off Mass Production of Intel CPUs in 2H21 as Intel Shifts its CPU Manufacturing Strategies, Says TrendForce
- Gartner Says Worldwide Semiconductor Revenue Grew 7.3% in 2020
- Qualcomm to Acquire NUVIA
- Value of Semiconductor Industry M&A Agreements Sets Record in 2020
- Chips&Media Adds Extraordinary Features in the Next-Generation Video Codec IPs, introducing the WAVE6 Series
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |