LV2005 Uniquely Addresses Growing Need for Comprehensive, Cost-effective Embedded Test and Measurement Solution Aimed at Decreasing Field Returns
SAN JOSE, Calif., May 31 /PRNewswire-FirstCall/ -- LogicVision, Inc., a leading provider of yield learning capabilities that enable its customers to quickly and efficiently improve product yields, today announced its next-generation LV2005 product release, an easy-to-use embedded test solution to tackle the increasingly difficult challenges associated with nanometer design and test. With a planned release in June, LV2005 incorporates new embedded test and diagnostic capabilities and provides a new level of usability that is expected to allow customers to realize increased ROI for nanometer-scale SoC designs. The LV2005 release allows customers to experience unmatched test quality, lower the cost of test, accelerate time-to- market and ultimately, decrease field returns.
With the shift to nanometer-scale designs, semiconductor manufacturers are faced with increasingly subtle defect mechanisms and growing process-design interactions resulting in an increasing number of performance and quality issues. These issues not only result in greater field returns but also in prolonged debug cycles, leading to increased time-to-market.
"As the industry has broken through the 100nm barrier, yield has become indelibly linked to design and test," said Dan Hutcheson, CEO of VLSI Research. "LogicVision has been on the frontier of providing tools that could bridge this link and LV2005 promises to push this to a new plateau, with improved usability and new embedded test and diagnostic capabilities."
Enhanced Usability and Feature-set
LV2005 has evolved from field-proven LogicVision technology. Central to LV2005 is a powerful RTL-level automation flow that ensures easy and successful integration of embedded test capabilities with minimal impact to the design flow and schedule.
This highly streamlined automation flow has been developed to move the integration of all embedded test capabilities to the front end of the design process. The flow includes unique test resource optimization capabilities so embedded test can be allocated and configured for a design without the need for expert test knowledge. LV2005 is also fully compatible with all third- party design flows including integrated RTL-to-GDSII flows. The result is an easy-to-use single pass flow that supports the faster integration of a comprehensive suite of advanced embedded test capabilities into today's largest and most complex designs.
"The yield learning environment helps customers bridge the test and yield gap by providing usable information that can improve their yield and lower their field returns, ultimately improving their ROI," said Jim Healy, president and CEO of LogicVision. "The LV2005 represents a true milestone because it not only delivers the most powerful embedded test capabilities available, but comes with a level of usability that is higher than existing mainstream test solutions."
Coupled with this true usability are many significant enhancements to LogicVision's suite of embedded test capabilities, including:
* New patented Burst-Mode(TM) test timing architecture -- Allows for easy integration of LogicVision's Embedded Logic Test (ELT) technology into any design and provides unmatched capabilities for detecting subtle delay defects, as well as signal integrity issues.
* New patented Embedded SerDes test capability -- Represents a breakthrough embedded approach to testing an unlimited number of high-speed SerDes channels operating at any frequency. Although the capability can be used with any high- or low-cost tester, it provides sub-picosecond test accuracy and requires only milliseconds to complete.
* New encapsulated ETAccess -- The real time software capability for diagnosing and data-logging silicon with embedded test can now be delivered as a library that gets linked into the production test program. This allows for easy distribution of this advanced capability to any test facility in the world.
About LogicVision, Inc.
LogicVision, Inc. provides unique yield learning capabilities in the design for manufacturing space. These capabilities enable its customers, leading semiconductor companies, to more quickly and efficiently learn to improve product yields. The company's advanced Design for Test (DFT) product line, ETCreate, works together with ETAccess and SiVision yield learning applications to improve profit margins by reducing device field returns, reducing test costs, and accelerating both time to market and time to yield. LogicVision solutions are used in the development of semiconductor ICs for products ranging from digital consumer goods to wireless communications devices and satellite systems. LogicVision was founded in 1992 and is headquartered in San Jose, Calif. For more information visit http://www.logicvision.com .
Forward Looking Statements
Except for the historical information contained herein, the matters set forth in this press release, including statements as to the expected features, benefits and availability of the LV2005 product, are forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially, including, but not limited to, the impact of competitive products and technological advances, and other risks detailed in Form 10-Q for the quarter ended March 31, 2005, and from time to time in LogicVision's SEC reports. These forward-looking statements speak only as of the date hereof. LogicVision disclaims any obligation to update these forward-looking statements.