Alameda, Calif. – June 2, 2005 – Averant Inc., a leading provider of advanced design verification technology for RTL designers, today announced the release of the SolidPC™ protocol checker for ARM’s AMBA™ 3 AXI™ bus protocol.
Jointly developed with ARM, SolidPC for AXI verifies that a design strictly adheres to the AMBA AXI specification. Built upon Averant’s formal engine, the tool employs a pre-defined set of AMBA technology rules to verify compliance using formal and exhaustive proofs. SolidPC offers a simple, push-button interface, allowing users to verify their designs comply with the protocol without the need for testbenches or programming of any kind.
“Formal methods offer an innovative new approach for the verification of AMBA bus protocols, as the static nature means that verification is much faster than simulation, and corner cases are more readily exposed,” said Tim Mace, AMBA product manager, ARM. “The definition of correct AMBA technology behavior, through the development of AMBA protocol rule sets, has done much to enhance the value of AMBA technology within the industry. By integrating our AMBA protocol rule sets into the SolidPC for AXI and AHB tools, developers will now have a suite of high-performance verification tools that can rigorously check designs against the AMBA protocol rules.”
Dr. Adrian Isles, the principle architect of Averant adds, “We partnered with ARM in the area of AMBA protocol verification because we believe ARM’s creation and endorsement of the property sets, coupled with the ease of use, execution speed and exhaustive nature of SolidPC for AXI will make this a powerful and compelling product.”
SolidPC for AXI joins SolidPC for AHB to provide a complete solution for verifying designs against AMBA protocols. The tool is used internally at ARM to ensure that ARM IP adheres to the AMBA bus protocol rules. ARM licenses the AXI protocol rules to Averant who provides sales and support of SolidPC for AXI worldwide.
Pricing and Availability
SolidPC for AXI will be available mid June 2005 on Windows, Linux, and Sun Solaris platforms. The software is priced at $40,000 for a one-year license in the US market.
Averant Inc., founded in 1997, is a privately held EDA company pioneering the new methodology and technologies for static functional verification. Averant provides Solidify™, a design tool that delivers unprecedented performance in block-level verification for RTL designs. It is a high-capacity, static RTL analysis tool that verifies the functional behavior of Verilog or VHDL blocks without using simulators or test vectors. Solidify improves design quality, reduces risk and uncertainty, shortens design cycles, and reduces the need for simulation based verification. Averant’s products are easily incorporated into synthesis, IP reuse, and FPGA design flows.