Powerful Automatic Transaction-Level Modeling Viewer Provides Comprehensive System-Level Design Observability Los Altos, CA – June 2, 2005
– Summit Design, Inc., a leading provider of electronic system-level (ESL) design solutions, today announced the release of Vista™ 1.1, an integrated development environment (IDE) for rapid SystemC-based analysis and debug.
The first-of-its-kind native source-based SystemC platform, Vista is newly equipped with a sophisticated transaction-level modeling (TLM) viewer that – working with the designer’s SystemC simulator of choice – provides the dramatically enhanced observability of system-level design behavior necessary for debug.
SystemC verification and optimization has delivered a significant simulation speed-up, but the time benefit has been largely lost in debug. Vista helps to solve this problem. Vista enables designers to automatically view communication protocols and system-level interfaces, and to identify transaction function calls between blocks, without the time-consuming manual code instrumentation that has historically been necessary in SystemC design environments.
The Vista TLM Viewer supports constructs critical to the hardware portion of system-level design with minimal set-up and short learning curve for both advanced and novice SystemC users.
Until now, abstraction levels higher than cycle accurate have been very difficult to analyze and debug. The Vista TLM viewer solves this problem with direct observation of the key attributes of SystemC TLM, such as time, kernel cycles, return value, function attributes, structure and concurrency.
Vista’s TLM waveform viewer expands simulation time to display simulation cycles, enabling designers to clearly view the event ordering that is critical to the debug of event-based and un-timed designs (PV-Programmers view, PVT-Programmers view + timing), as well as spike analysis.
Vista efficiently handles SystemC instance-specific breakpoints, and the waveform viewer displays not only system-specific signals, but also any object in the design. Every arbitrary SystemC or C++ object can be graphically traced on the activity time line or textually observed with no additional and intrusive coding.
“By combining the C++ language view with a hardware design view and an understanding of SystemC semantics, Vista is a true SystemC IDE,” stated Zvika Amir, Technical Marketing Manager at Summit Design. “While Vista is an ideal choice for the Advanced SystemC user, even novice users will find that they can be up and running within an hour, without any product-specific training.
The tight link between Vista’s design and code browsers enable first-time SystemC users to easily understand a SystemC design. Furthermore, the developer has access to public domain design environments – such as Xemacs, GDB, GCC, OSCI – all through the single Vista IDE, and without the need for complex integration between them.”
“Established C++ IDEs provide support for only the software view of SystemC - but no support for hardware concepts and SystemC semantics,” said Emil Girczyc, President and CEO of Summit Design. “Vista fills this potentially crippling gap. It provides users with significant automation and added insight in what has historically been a painful manual process.
After using Vista, customers have told us that they can debug in minutes cases that previously took them days. In short, Vista cracks the debug problem.”
Vista is easy to integrate with established ESL design flows. With its unique architecture, customers can directly link their executables into Vista with no need for complicated project setup.
Customers can choose to use their existing makefiles with Vista, or have Vista automatically create the makefiles for the design. Pricing and Availability
Vista 1.1, and the Vista TLM viewer, will be available in Q3 of 2005. Vista 1.0 is available now, with prices beginning at $5,000 for a one-year time-based license. Vista is currently available on the Linux platform.About Summit
Summit Design’s industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk.
Summit’s products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. System Architect™ enables massive increases in design complexity and performance by analyzing architectural tradeoffs to arrive at optimized system specifications. Vista™ and Visual Elite™ ensure swift, successful design modeling and implementation in SystemC, Verilog, and VHDL.
Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products.
Summit Design is headquartered in Burlington, Mass. with offices throughout the US, Europe, Japan, Israel, and ROA.
To learn more, please visit http://www.summit-design.com