FREMONT, Calif., July 21 -- Building on its 90 nanometer (nm) process technology leadership, Virage Logic Corp. (Nasdaq: VIRL), a pioneer in Silicon Aware IP(TM) and leading provider of semiconductor intellectual property (IP) platforms, today announced the first end-user commercial development and licensing of advanced embedded memory IP at the 65nm process node. (See related announcement: "Virage Logic Extends Lead with 65nm ... " released July 21, 2005.) Freescale Semiconductor has licensed Virage Logic's IPrima Mobile(TM) Area, Speed and Power (ASAP) Memory(TM) Ultra-Low-Power (ULP) memories and its Self-Test and Repair (STAR) Memory System(TM) for use in its cellular baseband products.
"Our experience with Virage Logic's ULP memories and STAR Memory System at 90nm gave us the confidence to leverage their IP platforms in our 65nm designs," said Chekib Akrout, Freescale Semiconductor vice president, design technology. "Virage Logic's technology leadership, combined with their willingness to support our high performance, low power, and test integration needs in a timely fashion, made them our first advanced embedded memory IP provider for next-generation cellular baseband processors in 65nm technology."
The increasing demand for wireless consumer products and the need to produce them as cost effectively as possible, is driving the move to 65nm process technology. This move to smaller and smaller process technologies presents new challenges in terms of power and performance management, as well as high-volume manufacturing requirements. Virage Logic's IPrima Mobile platform and STAR Memory System were designed to address just such challenges. The IPrima Mobile platform with its ULP memories, enables a broad range of power management methods to control both static and dynamic power consumption, including such advanced optimization techniques as block-level voltage islands, clock gating, mixed-transistor threshold voltage support, voltage and frequency scaling, back biasing and standby mode with state retention. By delivering up to 20X reduction in static and 80 percent reduction in dynamic power dissipation, IPrima Mobile significantly extends battery life, which is one of the key features consumers care about.
The STAR Memory System, a critical component to the successful early adoption of new process technologies, provides cost-effective on-chip test and repair of embedded memories in SoC designs. This enables significant die yield improvements while delivering reduced manufacturing costs and higher product reliability, both of which are critically important in high-volume consumer applications such as cellular phones. As the industry's only integrated embedded memory self-test and repair solution and the first product in Virage Logic's Silicon Aware IP initiative, the STAR Memory System eliminates the need for expensive external testers or laser repair equipment, thereby resulting in a drastic reduction in test development time and cost.
"Driven by the incredible demands of the cell phone market, Freescale set forth very aggressive targets for both power and performance. The combination of the Virage Logic IPrima Mobile ULP memories and STAR Memory System met those targets while also ensuring successful high-volume manufacturability," said Jim Ensell, vice president of marketing and business development at Virage Logic. "Working with innovative companies like Freescale that are committed to technology leadership and excellence and are willing to push the envelope in terms of process adoption enables us to strengthen and extend our own technology leadership position."
About Silicon Aware IP
To help System-on-Chip (SoC) designers address the increasingly complex performance and manufacturability issues at 130nm and below, Virage Logic has introduced a new class of semiconductor IP called Silicon Aware IP. Silicon Aware IP tightly integrates our Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes.
About Virage Logic's IPrima Mobile Platform
IPrima Mobile, the first in Virage Logic's offering of Application- Optimized IP platforms designed to target specific end-market applications, addresses the requirements of portable and hand-held applications. In a single, integrated platform IPrima Mobile includes:
Area, Speed and Power (ASAP) Memory Ultra-Low-Power (ULP) Memories -- single and dual-port ASAP SRAMs; single- and dual-port STAR (Self-Test and Repair) SRAMs; single- and dual-port RF (Register Files) and Read Only Memories (ROM).
ASAP Logic(TM) Ultra-Low-Power (ULP) Standard Cell Library -- Based on the ASAP Logic patented routing methodology and cell architecture and the Ultra-High-Density (UHD) Standard Cell set, the ULP Library typically provides up to 30 percent improvement in area when compared to conventional standard cell libraries while consuming 20 percent less dynamic and 7X less static power at nominal voltage thresholds. Level shifters are included as part of the ULP Library for power management.
Base I/O Cells and Mixed-Signal Blocks -- Extended operating voltage range CMOS buffers; SSTL-2 Class I and II; HSTL Class I and II; PCI and PCI-X transceivers; and USB1.1.
About Virage Logic's STAR Memory System
The STAR Memory System provides the most integrated solution for cost effective embedding, on-chip testing and repairing of multi-megabit memory designs. The system includes High-Speed, High-Density or Ultra-Low-Power memories to address a broad range of SoC design requirements. The system consists of one or more STAR and/or ASAP SRAM and/or ROM Memory blocks, a STAR Processor, and a STAR Fuse Box. Within the same environment, ASAP Memory sub- megabit memories can be tested and used. With customers experiencing yield improvements of up to 250%, the STAR Memory System can potentially save millions of dollars in recovered silicon, substantially reduce test costs, and achieve shorter time-to-volume.
About Virage Logic Corporation
Founded in 1996, Virage Logic Corporation rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. Today the company is a global leader in semiconductor IP platforms comprising embedded memories, logic, and I/Os and is pioneering the development of a new class of IP called Silicon Aware IP. Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers who develop products for the consumer, communications and networking, hand-held and portable, and computer and graphics markets. The company uses its FirstPass-Silicon(TM) Characterization Lab for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. Headquartered in Fremont, California, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.
Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to trends, business outlook, products, customer relationships and our financial results for the fiscal quarter ended June 30, 2005. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to forecast its business, including expected revenues, royalties and net loss for the third fiscal quarter ended June 30, 2005 and possible discrepancies between the preliminary results and the final results to be announced; the company's ability to ship against existing orders or customer deadlines; Virage Logic's ability to maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic's technologies by semiconductor companies and increases or fluctuations in the demand for their products; the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company's Annual Report on Form 10-K for the period ended September 30, 2004, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic's website (www.viragelogic.com) or from the SEC's website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
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