Building on Their Success at 130nm and 90nm, Long-Standing Customer Freescale and Foundry Partner UMC Select Virage Logic for 65nm
FREMONT, Calif., July 21, 2005 -- To make semiconductor manufacturing economically viable at the 65 nanometer (nm) process node, the ability to deliver high quality, highly reliable and optimal-yielding semiconductor intellectual property (IP) is essential. Virage Logic Corporation (Nasdaq: VIRL), a pioneer in Silicon Aware IP(TM) and leading provider of semiconductor IP platforms, is delivering just that to two long-standing patrons as they move to 65nm, extending its advanced process technology leadership position.
UMC and Freescale Semiconductor, a long-term 130nm and 90nm foundry partner and customer, respectively, have both selected Virage Logic as their first IP supplier for early IP development on the 65nm process node. UMC has engaged Virage Logic to collaborate on analyzing process parameters essential for the design of key IP elements for its 65nm process, which is currently in development. Freescale has licensed Virage Logic's IPrima Mobile(TM) Area, Speed and Power (ASAP) Memory(TM) and Ultra-Low-Power (ULP) memories and its Silicon Aware IP Self-Test and Repair (STAR) Memory System(TM). (See related announcements: "UMC and Virage Logic Collaborate ... " and "Freescale Selects Virage Logic's IPrima Mobile(TM) ... " both released July 21, 2005).
"Virage Logic's long-standing commitment to quality, reliability and manufacturability at advanced process nodes has enabled us to deliver several industry firsts," said Adam Kablanian, Virage Logic's CEO and president. "We were first to deliver silicon-proven IP at 90nm, first to deliver Silicon Aware IP that combines physical IP and infrastructure IP for optimal yields, and we're the first IP provider at 65nm. We take our leadership position very seriously and are committed to delivering the highest quality IP and support to ensure our customers can proceed with confidence at 130nm, 90nm and now at 65nm."
Virage Logic's focus on manufacturability and yield began with the introduction of the STAR Memory System in 2001 and continues with the company's announcement earlier this year of its Silicon Aware IP, which combines physical IP such as memories, logic and I/Os, with infrastructure IP for test, diagnostics, repair and yield enhancements. The result is high-yielding, highly reliable semiconductor IP at advanced process nodes.
"The expanded agreements with Freescale and UMC underscore the adoption of our Silicon Aware IP initiative. As customers are able to achieve reasonable yields at 65nm, the economic driver for advanced process nodes becomes a reality," added Kablanian.
Today's announcements follow on the heels of the May 31, 2005, press release "Virage Logic Joins with TSMC to Lead 65nm Ramp," which calls for Virage Logic to develop memory compilers for multiple memory architectures of TSMC's 65nm Nexsys(SM) process.
About Virage Logic Corporation
Founded in 1996, Virage Logic Corporation rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. Today the company is a global leader in semiconductor IP platforms comprising embedded memories, logic, and I/Os and is pioneering the development of a new class of IP called Silicon Aware IP. Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers who develop products for the consumer, communications and networking, hand-held and portable, and computer and graphics markets. The company uses its FirstPass-Silicon(TM) Characterization Lab for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. Headquartered in Fremont, California, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.
Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to trends, business outlook, products, customer relationships and our financial results for the fiscal quarter ended June 30, 2005. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to forecast its business, including expected revenues, royalties and net loss for the third fiscal quarter ended June 30, 2005 and possible discrepancies between the preliminary results and the final results to be announced; the company's ability to ship against existing orders or customer deadlines; Virage Logic's ability to maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic's technologies by semiconductor companies and increases or fluctuations in the demand for their products; the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company's Annual Report on Form 10-K for the period ended September 30, 2004, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic's website (www.viragelogic.com) or from the SEC's website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
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