INTEL DEVELOPER FORUM, SAN FRANCISCO, Aug. 23, 2005 -- Denali today announced that its Databahn(TM) design IP and PureSpec(TM) verification IP products now support the recently announced Serial ATA Revision 2.5 specification from the Serial ATA International Organization (SATA-IO). Denali's Databahn IP for SATA is a complete, synthesizable IP core for designs based on the SATA Revision 2.5 specification. Denali's PureSpec verification IP product provides a comprehensive verification solution for designs incorporating the new SATA Revision 2.5 specification.
The integrated SATA Revision 2.5 specification that combines the original core specification, all the optional specifications and years of errata into one complete integrated specification, including features such as: core speeds of SATA 1.5Gb/s, SATA 3Gb/s, Native Command Queuing, Hot Plug, ClickConnect connectors, Port Multiplier, eSATA, xSATA, and many more.
"The new SATA Revision 2.5 specification consolidates the original SATA spec with six additional feature specifications and represents a new milestone in the maturity and stability of the full SATA feature set," said Knut Grimsrud, SATA-IO chairman and Intel senior principal engineer. "Commercial IP products based on the new SATA Revision 2.5 specification, such as the Denali IP offerings, are a key part of the ecosystem in enabling timely product support for SATA technology and the rich SATA feature set."
Denali's Databahn SATA product is configurable IP core, providing complete support for the new SATA Revision 2.5 specification. It is available fully integrated with Databahn DDR memory controller or as a standalone SATA core. The direct integration with Denali's DDR memory controller core keeps SATA data off the system busses, lowering CPU overhead. For more information about Databahn, visit: www.denali.com/databahn.
Denali's PureSpec product for SATA is a comprehensive solution for verifying functionality, compliance, and interoperability of all features and functionality included in the SATA Revision 2.5 spec, at the pre-silicon stage of chip or IP core development. PureSpec verification IP includes a configurable bus functional model (BFM), protocol monitor, and complete assertion library for all SATA components in the topology, including the host and one or more SATA devices. For more information about PureSpec, visit: www.denali.com/purespec.
Denali Software Inc. is the world's leading provider of EDA tools and Intellectual Property (IP) solutions for chip interface design, integration and verification. Its Databahn(TM) Design IP products offer fully configurable design cores for complex interfaces such as Serial ATA and DDR- based memory systems. Denali's PureSpec(TM) Verification IP product supports all complex interfaces, including PCI Express, Advanced Switching Interconnect (ASI), USB, Ethernet, CE-ATA, and Serial ATA. More than 400 companies worldwide use Denali's tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, visit Denali at http://www.denali.com . Telephone: 650-461-7200.
NOTE: The Denali logo, Denali, and Databahn, PureSpec, MMAV and SOMA are trademarks of Denali Software Inc. PCI Express is a registered trademark of PCI-SIG. All other trademarks are the property of their respective owners. Source: Denali Software Inc.