SANTA CLARA, Calif. and GRENOBLE, France – August 30, 2005
- SOISIC today introduced the industry’s first Customer-Owned-Tooling (COT) design kit for 90-nm Silicon On Insulator (SOI) to enable fabless semiconductor companies to complete successful designs that are up to 35 percent faster and reduce power consumption by as much as 50 percent compared with chips manufactured on bulk CMOS processes. SOISIC design kit is silicon-proven on Freescale Semiconductor’s advanced 90nm SOI process technology.
The design kit consists of multi-Vt standard cell libraries, memory compilers and standard I/Os for manufacturing on Freescale 90-nm SOI process technology. The immediate availability of the SOISIC Design Kit marks the entry of SOI technologies in the mainstream COT market. Other COT announcements are expected to follow.
“Until now, SOI supply was limited to large integrated devices manufacturers (IDMs) with proprietary EDA tools and flows and substantial up-front investment,” said Eduard R. Weichselbaumer, President and CEO of SOISIC. “SOISIC world class IP team has integrated Freescale advanced SOI process technology with best-in-class device and design expertise to make this technology available to the mainstream COT market.”
SOISIC is currently in the third generation of IP development at the 90-nm node. The market requires new devices with increased speed and lower power consumption concurrently. SOISIC Freescale-Soisic90nmSOICOTPR-final.doc
Design Kit will allow designers to fully utilize the benefits of SOI to meet the performance and power consumption benchmarks the industry demands.
This SOI technology demonstrates outstanding speed and power benefits compared with 90nm bulk CMOS processes:
- 30 to 40 percent speed improvement
- Reduction of power consumption by a factor of 2x
- Up to 10 percent area reduction.
This is achieved using SOISIC SOI-specific patented IP, patented characterization methodology and proprietary architectures.
SOI design kit works with Standard EDA tools and flows
The SOISIC Design Kit lets SoC designers design with their industry standard EDA tool flows. No specific tools or retraining of customer engineers is required because all SOI specific effects are handled at the IP level making it fully transparent to the designers.
SOISIC continues to work closely with major EDA tool vendors to enhance their tool capabilities. The full design kit is available today from SOISIC.
SOISIC is the world’s leading company in Semiconductor IP for Silicon On Insulator technologies. The Company has worked across the globe in multiple SOI Processes and Multiple nodes from .25µm down to 90nm, both in Ultra Low Power and High Performance. SOISIC has helped some of the world's leading companies begin their SOI Development and to use SOI for low-power applications. www.soisic.com