CyberShuttle(SM) Features Range of Power and Performance Options Hsinchu, Taiwan, R.O.C. – October 5, 2005
-- Taiwan Semiconductor Manufacturing Company (TSE: 2330, NYSE: TSM) has successfully completed the first of three CyberShuttle prototype production runs for the company’s industry leading 65 nanometer Nexsys(SM) Technology for SoC. Five major customers’ designs and multiple 3rd party IP designs are on the first shuttle, which supports two different 65nm process options – the battery-saving Low Power process and the power-performance balanced General Purpose option.
The prototype launch opens the doors to 65nm prototyping work. Two more 65nm prototype shuttles will be launched by the end of 2005, and will include the Low Power, General Purpose and other enhancement process options. Bookings for all three shuttles are strong.
Beginning in 2006, TSMC will launch additional 65nm shuttles every other month, enabling customers and EDA, IP and library suppliers to prototype and qualify their leading-edge designs.
“The launch of the foundry industry’s first production prototype runs at the 65nm node realizes our commitment to make the Nexsys 65nm process available by the end of 2005,” said Jason Chen, vice president of corporate development at TSMC. “In addition, it allows our customers and third-party providers to get a jump on product development at this node. It’s also a clear indication that the industry is eager to utilize this technology.”
The 65nm CyberShuttles’ high utilization rates are indicative that several major companies are well into their 65nm development efforts and are ready to tape out. The tape-outs include a range of products, nearly all of which support wired and wireless consumer electronics applications.
Among the companies aboard this groundbreaking first run are Altera, Broadcom, and Freescale.
“By using TSMC's 65nm Cybershuttle, Altera has been able to make key architecture decisions that will allow us to extract maximum performance from the TSMC process while reducing power and improving manufacturability of our next generation FPGAs,” said Bill Hata, vice president of product engineering for Altera Corp. “Our collaboration with TSMC on the Cybershuttle and the long standing partnership we have with them will enable our successful delivery of a fully optimized 65nm product.”
“Broadcom is pleased to be an early development partner with TSMC in the launch of its 65nm technology,” said Vahid Manian, Broadcom's senior vice president of Global Manufacturing Operations. “We expect that the collaboration between Broadcom and TSMC on this process technology will result in products ranging from mobile to desktop applications that achieve superior performance, lower cost and slash power requirements.”
“Power consumption is a critical consideration in all design decisions at 65 nanometers for wireless applications,” said Alasdair Smith, technology development operations manager at Freescale’s Wireless and Mobile Systems Group. “TSMC has been an invaluable partner on several successful 90-nanometer projects and Freescale looks forward to continued success at 65-nanometer. Freescale’s advanced 65-nanometer power management architecture will give designers greater freedom to innovate in communication, multi-media and other applications.”
TSMC’s 65nm Nexsys technology is the company’s third-generation semiconductor process employing both copper interconnects and low-k dielectrics. The new process technology enables a standard cell gate density twice that of TSMC’s Nexsys 90nm process with a very competitive 6T SRAM and a 1T memory cell size. It also features an aggressive gate oxide thickness to further enhance transistor performance.
TSMC’s 65nm success builds on the company’s industry leading 0.13-micron and 90nm track records. TSMC estimates that the 65nm production will start to ramp up by the second quarter of 2006. About TSMC
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates two advanced twelve-inch wafer fabs, five eight-inch fabs and one six-inch wafer fab. TSMC also has substantial capacity commitments at its wholly-owned subsidiaries, WaferTech and TSMC (Shanghai), and its joint venture fab, SSMC. TSMC's corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit http://www.tsmc.com