SCOTTSDALE, Ariz., October 12, 2005 - Three emerging chip-to-chip interconnections: HyperTransport, PCI Express, and RapidIO are being increasingly integrated into semiconductors and systems, and shipments bearing these technologies will grow over the next several years, reports In-Stat (http://www.in-stat.com). “Each interconnection is finding applications in which to flourish,” says Chris Kissel, In-Stat analyst. “RapidIO has found a home interconnecting DSPs, HyperTransport has become the front-side bus and processor-to-processor interface for all AMD processors, and PCI Express is the new standard for board-level peripheral interconnects in all computing applications.”
A recent report by In-Stat found the following:
PCI Express will experience the highest growth of all three interconnects rising from 8.7 million systems in 2004 to 283 million in 2009.
Despite shrinking use in consumer applications, In-Stat is forecasting a 28% CAGR in the use of HyperTransport fueled by its success in computing and routing applications.
RapidIO is clearly a distant third in I/O wins; however, it has found a defensible position in telecommunications.
Although each interconnect has roadmaps to higher speeds and bandwidth, each faces challenges overcoming jitter using current circuit board technology. These challenges may eventually force a transition to optical interfaces.
The report, I/O, I/O, How Much Faster Can We Go: Chip-to-Chip Interconnects (#IN0502566ESCA), covers three emerging chip-to-chip interconnections: HyperTransport, PCI Express, and RapidIO. The report provides the origins and evolution of each interconnect, technical barriers and standards roadmaps, and forecasts for each interconnect in selected market applications.
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