When it comes to IP, caveat emptor, panel says
EE Times: When it comes to IP, caveat emptor, panel says | |||
Brian Fuller (10/13/2005 11:54 PM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=172300952 | |||
SANTA CLARA, Calif. Intellectual property buyers must be forewarned and forearmed before they dive into purchasing IP cores, a panel of industry experts insisted Thursday (Oct. 13). "Please kick your vendor's tires," said Harmel Sangha, director, CoreWare IP marketing for LSI Logic Corp. (Milpitas, Calif.) The panel, held at the Denali Memcon event here, was moderated by EE Times Semiconductor Editor Ron Wilson, who is managing the newspaper's |
IP, an industry almost given up for dead a few years ago, has doggedly pursued viable business models and has established itself as more and more mainstream design edges in system-on-chip methodologies. Wilson probed the three vendors and two users on the panel about preparation, verification and other issues that continue to challenge the IP model.
He noted that findings in the latest Industry Challenge: IP Selection research suggest that many of the respondents had decided to use IP in their designs in a nearly ad hoc way. Panelists agreed this is all too common and certain not prudent.
Shyam Pullela, manager of hardware engineering at Cisco Systems Inc., said much of that ad hoc activity stems from last–minute decision making. "You look for IP because you're always in a hurry," he said. "So you're always in a hurry" and not necessarily making prudent decisions about how to incorporate IP into your flow, he added.
"You are better off spending the time up front (to research the IP and its implications) and not do it ad hoc," he said.
Kevin Jones, engineering director for verification, DFT and Modeling at Rambus Inc., hammered on the "buyer beware" theme, especially when it comes to verifying the IP within the context of the system. "How is it being built? How is it being tested? The IP waters are not all of equal depth," he told the Memcon audience. "It's very imprudent to buy IP without studying it."
Sean Smith, chief verification officer at Denali, suggested that too many users tend to think that IP is so nailed down that they don't have to worry about it. A PCI Express core, for instance, is a complicated piece of logic.
"The chances that the (PCI Express) IP vendor can implement or guarantee 100 percent of that spec is non-existent," he said. "I would urge you as consumers to dig deeper."
-
- -
Related News
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |