English
Freescale exec says central design pays dividends
Dylan McGrath
EE Times
(10/21/2005 7:58 PM EDT)
SAN FRANCISCO — Changes in Freescale Semiconductor Inc.'s approach to chip design, including standardizing on methodologies and appointing a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit Sadana, senior vice president of strategy and business development.
Sadana told EE Times Friday (Oct. 20) that, since joining Freescale in December 2004, he has implemented several changes to centralize design activity within the company in support of Freescale's overall goal of reducing cost structure and improving efficiency.
In addition, Sadana credited the addition of Chekib Akrout, the former IBM vice president who headed the design effort on the Cell processor, with adding experience, leadership and star power to Freescale's design efforts. Akrout quietly joined Freescale several months ago as vice president of design systems.
EE Times
(10/21/2005 7:58 PM EDT)
SAN FRANCISCO — Changes in Freescale Semiconductor Inc.'s approach to chip design, including standardizing on methodologies and appointing a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit Sadana, senior vice president of strategy and business development.
Sadana told EE Times Friday (Oct. 20) that, since joining Freescale in December 2004, he has implemented several changes to centralize design activity within the company in support of Freescale's overall goal of reducing cost structure and improving efficiency.
In addition, Sadana credited the addition of Chekib Akrout, the former IBM vice president who headed the design effort on the Cell processor, with adding experience, leadership and star power to Freescale's design efforts. Akrout quietly joined Freescale several months ago as vice president of design systems.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related News
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation