English
Making life easier for multicore SoC software developers
By Bernard Cole, Embedded.com
Nov 7 2005 (9:00 AM)
Putting multiple processors on a single chip or on a single board has enabled embedded system hardware designers to provide more features and higher processing speeds using less power, thus solving many design problems. But for software developers - and vendors - this trend presents a daunting set of challenges.
In the embedded environment, the developer is no longer dealing with the familiar balanced, homogeneous and symmetric multiprocessing (SMP) model of servers and large computer systems. Rather, the designer of an embedded or mobile device now may have two, three or four processors to program and debug, a heterogeneous and unbalanced mix of RISC, DSP and network architectures, operating asymmetrically.
Hardware developers at recent conferences have bemoaned the lack of tools and building blocks that are up to the challenge of doing software development in multicore environments. However, many embedded software vendors believe they have solutions to most of the immediate problems. The big question is where to go next as the number of multicores and the heterogeneity of such designs increases.
Nov 7 2005 (9:00 AM)
Putting multiple processors on a single chip or on a single board has enabled embedded system hardware designers to provide more features and higher processing speeds using less power, thus solving many design problems. But for software developers - and vendors - this trend presents a daunting set of challenges.
In the embedded environment, the developer is no longer dealing with the familiar balanced, homogeneous and symmetric multiprocessing (SMP) model of servers and large computer systems. Rather, the designer of an embedded or mobile device now may have two, three or four processors to program and debug, a heterogeneous and unbalanced mix of RISC, DSP and network architectures, operating asymmetrically.
Hardware developers at recent conferences have bemoaned the lack of tools and building blocks that are up to the challenge of doing software development in multicore environments. However, many embedded software vendors believe they have solutions to most of the immediate problems. The big question is where to go next as the number of multicores and the heterogeneity of such designs increases.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Sonics Introduces SoC Performance Profile and Debug IP for System Architects and Software Developers
- Sonics Announces New Webinar, Making Mobile SoC Device Design Easier With System IP
- Software Porting to Tensilica-based Multicore SOC Designs now aided by PolyCore Software's Poly-Platform
- CriticalBlue and MIPS Technologies Enable Software Developers to Quantify Benefits of Migrating to MIPS32-Based Multicore Platforms
- CAST Introduces SOC Kernels, Combining Essential IP Cores and Software for Easier System Development
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation