SOISIC Achieves First-Time-Right Silicon From 90nm High-Speed Silicon-On-Insulator tape-outs

Six devices totaling 10 million transistors prove effectiveness of industry’s first Customer-Owned-Tooling SOI design kit

SANTA CLARA, Calif. And GRENOBLE, France – Nov. 9, 2005 - SOISIC today announced it has successfully produced six working integrated circuits from 90-anometer Silicon-on-Insulator tape-outs to qualify the industry’s first Customer-Owned-Tooling (COT) design kit. The devices were produced on Freescale Semiconductor’s advanced SOI process technology and provide fabless ASIC designers a clear path to seamlessly migrate their CMOS-based designs onto an SOI process to achieve better performance and lower power consumption for their chips.

On its first pass through the fab, SOISIC successfully taped out Standard Cells with three Vt’s, Input-Output circuitry, memories and a data encryption and decryption circuit consisting of 8 million transistors. All the parts worked successfully and all were produced to qualify SOISIC’s COT design kit for 90nm SOI process technology. The success of the tape-outs further proves the company’s “first-time-right silicon” philosophy behind its design kits.

The tape-outs offer further evidence that ASIC designers can produce advanced SOI parts in an industry standard EDA design flow without having to resort to proprietary and costly design tools and flows. This opens the benefits of SOI to a greater design community which previously was reserved for Integrated Device Manufacturers.

“These tape outs provide silicon proof of SOISIC’s leadership in bringing SOI technology to the ASIC/COT designer,” said Eduard R. Weichselbaumer, President and CEO of SOISIC. “SOISIC’s world class IP team and patented technology has shown that leading edge SOI technology is now available with “first-time-right silicon” to all designers who have bulk CMOS design capabilities without additional infrastructure investments.”

SOI design kit works with Standard EDA tools and flows

The SOISIC Design Kit lets SoC designers design with their industry standard EDA tool flows. No specific tools or retraining of customer engineers is required because all SOI specific effects are handled at the IP level making it fully transparent to the designers.

SOISIC continues to work closely with major EDA tool vendors to enhance their tool capabilities. The full design kit is available today from SOISIC.
About SOISIC:  

SOISIC is the world’s leading company in Semiconductor IP for Silicon-on-Insulator technologies. The company has worked across the globe in multiple SOI Processes and Multiple nodes from .25µm down to 90nm, both in Ultra Low Power and High Performance. SOISIC has helped some of the world's leading companies begin their SOI Development and to use SOI for low-power applications.
www.soisic.com