LONDON -- November 21, 2005 -- Constant innovation in the integrated circuit (IC) industry, coupled with a growing demand for high-performance electronic devices, is driving the uptake of novel design platforms such as structured application-specific integrated circuits (ASICs).
In addition, the inability of existing technologies such as field programmable gate arrays (FPGAs) and standard ASICs to meet the requirements of mid-volume (more than 10,000 units) applications is further bolstering demand for structured ASICs.
"Structured ASICs are proving to be highly promising components for next-generation devices and combine the cost advantage of ASICs and the low-risk nature of FPGAs while dramatically simplifying the design process," explains Technical Insights (http://technicalinsights.frost.com) Research Analyst Sivakumar Muthuramalingam.
The structured ASIC cut the nonrecurring engineering (NRE) expenses by more than 85.0 per cent in derivative chips and is set to become a crucial element in the upcoming deep sub-micron (DSM) designs.
"A significant percent of FPGA design wins could now be lost to structured ASICs that lowers cost and time to market, while increasing performance," observes Muthuramalingam.
The Structured ASIC technology is capable of supporting many of today's demanding system-on-chip (SoC) applications because of its unique configurable nature along with the availability of high-speed block RAMs, and mask programmable input/output as well as its ability to support soft synthesizable IP.
In order to modify the functionality of complex SoCs--both predesign and postdesign cycle-- without incurring additional design or bill-of-materials costs, researchers in a France-based design company, have developed a solution for the rapidly growing reconfigurable SoC market. This state-of-the-art technology has the ability to serve various sizes and types of electronic application and has quicker time-to-market compared to traditional standard ASICs.
Despite the several benefits of structured ASICs, researchers still need to address issues such as cross talk and signal integrity when implementing designs at DSM levels. Further, in the more advanced process nodes, power leakage is a serious issue that needs to be resolved.
Another major challenge lies in generating awareness and popularizing structured ASICs across a diverse range of end-user applications.
"The initial target markets for structured ASICs will be applications such as telecommunications, data storage, and digital computing, and networking that demand high performance, but require modest production volumes.
Currently, the communications industry is poised to be the largest user of structured ASIC products, with the wireless and wired communications, and mobile base station segments using the majority of applications.
The other major end-user category for structured ASICs will be the industrial sector, with the largest applications being in the medical, industrial automation, and instrumentation space.
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