English
Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
Sidense introduces 1T-Fuse(TM), an Embedded Non-Volatile Memory technology, in Logic CMOS process
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Ottawa, Canada - November 21, 2005 - Sidense Corp., an Ottawa startup, announced today that it has developed an embedded non-volatile memory (NVM) intellectual property (IP) core, targeted to the most widely used standard logic digital CMOS process. The Sidense design is based on a patent pending technology, which does not require any additional masks or process steps, and utilizes only one transistor as a memory cell positioning it as a leader in area efficient NVM IP core solutions.
"Most of our competitors are either using larger structures which require change to the process, or use technologies that are not easily scalable to 90nm and below. We have designed one-time-programmable (OTP), non-volatile memory macros that are very small and faster then other solutions on the market. Our 1T-FuseTM memory is extremely secure and very difficult to reverse engineer, if not impossible. This makes it ideal for secure code storage applications such as encryption keys", stated Xerxes Wania, President and C.E.O. of Sidense.
Sidense offers their IP as a hard macro, targeted towards different foundries and configurations with supporting documentation, test benches and design files. Sidense 1T-FuseTM has been silicon proven in 130nm and can be portable to 90nm, 65nm and below.
About Sidense
Sidense Corp., founded in 2004 by memory and IP veterans, focuses on developing Non-Volatile Memory (NVM) intellectual property (IP) cores, to be embedded onto standard logic digital CMOS Application Specific Integrated Circuits (ASICs) and custom Integrated Circuits (ICs). Potential applications include fuse and FLASH replacement, code storage, RFID, Unique ID, encryption, key storage and is also used in Digital Rights Management (DRM). They currently have offices in Mississauga and Ottawa, Canada. www.sidense.com
|
||||||
Related News
- Virage Logic Unveils One Mega-Bit Embedded Reprogrammable Non-Volatile Memory (NVM) on Standard CMOS Process
- Virage Logic Announces Qualification of Embedded Non-Volatile Memory on Tower Semiconductor's 180-nm CMOS Logic Process
- Kilopass Announces 90nm On-Chip Embedded Non-Volatile Memory IP for SoC Designs Using General Purpose and Low Power Standard Logic CMOS
- UMC and Virage Logic Announce Qualification of Embedded Non-Volatile Memory Technology on UMC's 0.18um Logic Process
- Kilopass introduces 90-nanometer standard CMOS embedded non-volatile memory technology for secure storage of system firmware and chip IDs
Breaking News
- Xylon's Updated logiHSSL IP Core Seamlessly Connects Infineon AURIX Microcontrollers with AMD Adaptive SoCs and FPGAs
- Electronic System Design Industry Posts $4.7 Billion in Revenue in Q2 2024, ESD Alliance Reports
- NVMe Updates Expand Discoverability, Security
- Boosting Efficiency and Reducing Costs: Silvaco's Approach to Semiconductor Fabrication
- Alphacore teams with Southwest Advanced Prototyping HUB at ASU to advance national security with nearly $30 million in federal funding award
Most Popular
- BrainChip Introduces Lowest-Power AI Acceleration Co-Processor
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- Xiphera Partners with IPro for the Israeli Chip Design Market
|
E-mail This Article | 
|
|
Printer-Friendly Page |