Tallika Announces New Design Center in Chennai, India
Mesa, AZ. -- December 7, 2005 – Tallika Corporation, a Semiconductor Intellectual Property and Design Services Company, announced the opening of its new Design Center in Chennai India.
“Today’s announcement is the culmination of several months of planning and preparation and we are very excited about the prospects of providing high quality Design Services from our new location in Chennai”, said Hemi Bhatnagar, President and CEO of Tallika Corporation. He added, “Chennai is home to some of India’s premier Engineering institutions, providing an abundance of talent; it is geographically very well located and connected to the outside world and it provides excellent infrastructure for future growth.”
The City of Chennai is located approximately 200 miles South East of Bangalore. The new Design Center will become fully operational in January 2006.
About Tallika Corporation
Tallika Corporation is a leading provider of Silicon Intellectual Property and Professional Design Services for consumer, networking, computing, and storage markets. Tallika’s IP Portfolio includes PCI Express Controllers, Security Solutions and DDR I/II Controllers. Tallika’s design services include turn-key Specification to GDSII – Specification, RTL, Verification, and RTL-to-GDSII – for digital and mixed-signal designs. Tallika specializes in design services for system level enablement PCI Express and Security technologies for its Customers.
For more information on Tallika’s Products and Services, please visit http://www.tallika.com
|
Related News
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
- M31 Opens Bangalore R&D Design Center in India Expands Recruitment of Global Talent
- Omni Design Opens Design Center in Hyderabad, India
- Omni Design Technologies opens design center in Bangalore, India
- ChaoLogix Opening India Engineering Center To Meet Global Demand for ChaoSecure Technology That Boosts Semiconductor Chip Security
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |