Lexra Announces Low-Power RISC-DSP CORE, Offering Better Performance at Lower Power than an ARM9E

SAN JOSE, CA (October 2, 2000) - ASIC Designers building portable, feature-rich, battery-powered embedded systems are disarmed by their lack of choice in low-power processor cores. Lexra, a leading developer of processor cores for embedded applications, adds another viable choice by introducing the new LX5180 RISC-DSP core. For applications such as MP3 and AC3, Web-enabled digital cameras, Voice-over Internet Protocol (VoIP) and PDAs, the LX5180 can operate on as little as 40 percent of the power an ARM9E demands for the same application.

"With the LX5180, we have broken ARM's claim as the low-power CPU IP core supplier," says Charlie Cheng, president and CEO of Lexra Inc. "It will enable us to compete in high-volume portable consumer applications where up to now, the MIPS ISA has seen limited success."

In addition, next generation applications like 3G cellular will demand more performance. Here, the LX5180 has a clear advantage over the ARM9E. A LX5180 used only 20 MIPS of its total 150 MIPS performance to perform the G.723.1 full duplex VoIP codec algorithm. The ARM consumes 72 MIPS to do the same task. Only the LX5180 would have the headroom to do Web surfing and other features.

Catering to a new class of power-sensitive applications

New embedded systems demanding increased performance with frugal power consumption is best illustrated by the next generation Web-enabled cellular phones. According to Micrologic Research, a market research firm based in Phoenix, Ariz., the 2-million wireless Internet subscribers in 1999 will grow to 5 million this year and 93 million by port.

At the heart of the LX5180 is a new, low power CPU engine which takes advantages of several power design optimizations. First, the LX5180 takes advantage of its synthesizable nature by optimizing the CPU database for each specific process technology, as well as the target operating frequency. Lexra's experiments have shown that the power dissipation of the LX5180 varies between 0.3 mW/MHz at below 50 MHz all the way to 0.5 mW/MHz at 180 MHz. For large structured areas such as register file, the LX5180 minimizes the power consumption with custom designed techniques not available from synthesis tools. The register file, which is the largest block of the CPU uses clock gating to shut-off power when not used. Furthermore, much of the logic within the CPU has been further enhanced to not recompute every cycle when inputs stay the same. Lastly, for Lexra's SmoothCore licensees, the clock buffers and the power supply have been optimized to conserve power dissipation.

An algorithm common in image processing applications, a simple 64-sample dot-product, best illustrates this performance and power savings advantage of the LX5180. The LX5180 running at 180 MHz performs the function in 600 ns. The ARM9E core takes three times as long, 1800 ns. To compute this function, the LX5180 consumes only 48 mW of power; the ARM9E core uses more than twice as much power, at greater than 100 mW.

In terms of development tools, Lexra provides a complete suite of development tools from GreenHill Systems, Embedded Performance, Inc. and Calast. These include C compiler, assembler, debugger, In-Circuit Emulator (ICE), and a cycle accurate simulator.

Pricing and Availability:

Customer shipments of the LX5180 will begin in 3Q 2000, with full production in 4Q 2000. The RTL version of the LX5180 is priced at $425,000 for one project.

About Lexra:

Lexra, Inc. is a leading microprocessor developer specializing in RISC and DSP cores for the embedded market. In addition to competitive performance, small die size and low power consumption, Lexra's processor cores are also easy to use, easy to port and provide customers with cost effective solutions. Lexra is headquartered in San Jose, CA. Further information can be found at http://www.lexra.com. MIPS, MIPS I, MIPS16, R3000, and other MIPS common law marks are trademarks and/or registered trademarks of MIPS Technologies, Inc. Lexra, Inc. is not associated with MIPS Technologies, Inc. in any way. Unaligned loads & stores are not supported in hardware.