See 667-Mbps DDR2 SDRAM Interface Demonstration at DesignCon 2006
SAN JOSE, Calif. -- Feb. 6, 2006 -- Altera Corporation (Nasdaq: ALTR) today announced that its Stratix(R) II device family is qualified to support the 667-Mbps DDR2 SDRAM interface data rate. Altera's new auto-calibrating PHY memory interface controller intellectual property (IP) core and the superior signal integrity of its Stratix II FPGAs enables Altera to deliver this high data rate to designers of high-speed applications. Altera will demonstrate the 667-Mbps DDR2 SDRAM interface in booth 224 at DesignCon 2006, February 7-8 in Santa Clara, Calif.
"Micron is pleased to work with Altera to provide market-leading memory solutions that address the requirements of today's high-end memory systems," said Terry Lee, executive director of advanced technology and strategic marketing, Micron Technology, Inc. "Stratix II devices and Micron 667-Mbps DDR2 SDRAM is an excellent combination for customers looking to leverage 667-Mbps, currently the industry's highest DDR2 data rate."
Altera provides a complete solution to help designers successfully interface Altera(R) FPGAs to DDR2 SDRAM. This offering includes technical documentation, software and tool support, IP cores, demonstration boards, characterization reports and simulation models. More information can be found at http://www.altera.com/memory.
"We chose Stratix II FPGAs because they provide the highest-performance DDR2 SDRAM memory interfaces, which enable us to deliver industry-leading capabilities in our Uni460 and Uni560 SDRAM testers," said Kang Jong Koo, chief research engineer, tester development group at UniTest.
"The 667-Mbps DDR2 interface exemplifies the performance customers can achieve with the Stratix II architecture," said David Greenfield, Altera's senior director of product marketing, high-density FPGAs. "Customers can leverage the industry's fastest FPGA fabric, the fastest parallel I/O solution and the superior signal integrity of our Stratix II FPGAs for their high-speed designs. Additionally, the availability of our fast speed grade devices enables customers to further achieve best-in-class performance."
Customers Can Engage Now
Altera also announced its DDR2 SDRAM 667-Mbps customer engagement program, an opportunity to engage with Altera in advance of the broad release of the 667-Mbps DDR2 SDRAM interface, which is timed for early Q2. As a member of this program, customers can develop their designs using Stratix II, the industry's fastest FPGAs, and Altera's memory solutions. The memory solutions, including parameterizable IP controller cores and associated design software for DDR2 SDRAM, automatically perform timing margin analysis and constraint selections to simplify the design process and reduce design cycle time.
All speed grades of Stratix II FPGAs have been shipping for over a year and are readily available in volume for customers today. For more information about Stratix II FPGAs, visit http://www.altera.com/stratix2. To participate in the DDR2 SDRAM 667-Mbps customer engagement program, customers can contact their Altera sales representative.
Altera Corporation is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com.