MOUNTAIN VIEW, Calif. An IC physical-design services startup thinks it has found the holy grail for accelerating design productivity and the answer doesn't lie in EDA tools. Instead, ReShape is focusing its development work on an automated methodology to use those tools.
ReShape spun out of Silicon Graphics in early 1997 with veteran chip designer Paul Rodman and software architect Margie Levine as co-founders. David Gregory, a co-founder of Synopsys and former head of that company's synthesis R&D, joined ReShape as president and chief executive officer in November 1999.
"EDA vendors are off building more complex tools, and they've left it to the user community to determine how to string tools together to solve a problem," said Gregory. "That job of stringing tools together has become harder and harder. To tackle the problem, we have to get to how chips are built, rather than the underlying tools one uses."
Basically, said Greg ory, Reshape is building a system that captures the knowledge of expert chip designers. The company has created a "metatool" that can automatically schedule and launch thousands of individual jobs and that promises to take most chip designs from netlists to GDSII layout files within two weeks.
The input to ReShape's system is a chip netlist; the output is final GDSII for a foundry. In concept, it sounds like the all-in-one physical design systems being touted by Magma Design Automation and Monterey Design Systems, but the actual work is done by a variety of EDA tools from different vendors. Gregory said that today, ReShape's tool environment "is mostly Avanti, but not exclusively so."
What ReShape intends to do is automate the job of the chip designer, Gregory said. That job may involve a large number of steps that have to be put together in a very specific way. ReShape's tool captures design knowledge using scripts built with a proprietary extension language based on Perl.
ReShape is using its a utomated approach to design high-performance graphics chips for 3DFX Interactive (San Jose, Calif.). Gregory said the 3DFX chip currently being worked on contains 1.5 million placeable instances. The Verilog netlist takes 800 Mbytes, but with a script that's just 2,000 lines long, the physical design can be completely automated.
"We can build this chip overnight," Gregory said. "It involves launching 2,100 jobs to do that."
Production runs, however, will take longer. And at this point, ReShape is "not ready to announce tapeouts," Gregory said.
ReShape currently has eight employees and has just closed a $7 million run of funding. Right now, the company is looking for some good physical design engineers and EDA developers. Gregory noted that finding employees is much more of a challenge than finding customers.
The original flow automation technology for ReShape was developed at Silicon Graphics. ReShape acquired the rights to the technology and has been refining it since being spun out from tha t company.
Don't look for your favorite EDA vendor to create an automated methodology, Gregory said. "There's an inherent conflict between EDA vendors and flows. The best flows have always been multivendor."