HSINCHU, Taiwan In a clear sign that pure-play silicon foundries have closed the technology gap with the large chip houses, Taiwan Semiconductor Manufacturing Co. Ltd. today announced it has begun taping out the first 0.13-micron IC designs from customers for production.
During September, TSMC expects to tape out at least seven customer designs for its 0.13-micron copper-chip processes--which, according to the Hsinchu-based foundry giant, is more than a year ahead of the industry's technology roadmap.
The announcement comes six months after TSMC said it had begun to distribute copper-based 0.13-micron test chips to electronic design automation suppliers, which used the devices to accelerate EDA tools for the advanced foundry process technology (see March 1 story). Today, TSMC officials declared the taping out of 0.13-micron chip designs was additional evidence that the com pany had taken a solid lead in process technology among its foundry rivals and integrated device manufacturers (IDMs), which operate their own wafer fabs to produce IC products.
TSMC's archrival - United Microelectronics Corp. (UMC) also claims to have a lead in 0.13-micron foundry services. Several months ago, UMC announced it was the first to produce working prototypes using a 0.13-micron copper process (see May 12 story). UMC, which is also based in Hsinchu, said it expects to begin pilot production of 0.13-micron products before the end of this year.
In its announcement today, TSMC the world's largest pure-play silicon foundry said the first taped-out IC designs for 0.13-micron production are expected to be fabricated in the fourth quarter this year. The company's roadmap for 0.13-micron production shows the initial wave of designs to begin in the fourth quarter with full qualification of core 0.13-micron drawn feature size processes being completed in March 2001.
Earlier this week, TSMC president F.C. Tseng hinted of today's announcement, saying that the foundry company had accelerated its 0.13-micron process schedule by about three months from its previous plan. He also told SBN that the company remains on schedule to start processing its initial 300-mm wafers by the end of this year (see Sept. 11 story).
TSMC is running its initial 0.13-micron process on 200-mm (8-inch) wafers, offering four varieties of the technology. A core CL013G technology is aimed at easing the migration of designs to the next-generation process, with emphasis on computing, communications, and high-density logic, said TSMC.
A low-voltage, high-performance version of the 0.13-micron process, designated CL013LV, is also available and aimed at early adopters in performance-oriented applications, such as microprocessors, graphics, networking, and high-sp eed SRAMs, said TSMC. A low-power verion, called CL013LP, is also being rolled out for portable and wireless applications. And, TSMC said it is working on an "ultra-high-speed" derivative of the 0.13-micron technology, called CL013HS, which will be aimed at specialized applications.
TSMC said it will tape out customer designs in the CL013G core, CL013LP low-power, and low-voltage (CL013LV) processes in September. The 0.13-micron processes will be supported by design libraries from Artisan Components, Avanti, Nurlogic Design, Synopsys, and Virage Logic, said the Hsinchu foundry supplier. Additional EDA tool suppliers are also working on offerings for the process, TSMC added.