"The combination of Actel's single-chip ARM7-enabled Fusion PSCs, the CoreMP7 soft ARM7 processor and this comprehensive design infrastructure frees designers from the need to settle for multi-chip solutions to complete their mixed-signal designs," said Jake Chuang, senior director, marketing, application solutions at Actel. "Additionally, the free availability of CoreAI, the optimized CoreConsole 1.1 IDP and Actel Libero IDE, significantly reduces the risk and costs associated with the development of feature-rich embedded systems."
Tool Optimizations Open Door to Fast, Easy Embedded Design
Actel's CoreAI IP block allows the CoreMP7 soft ARM7 processor core to interface with the analog resources on Actel's M7 Fusion devices through the Advanced Peripheral Bus (APB), enabling designers to directly control and configure the analog peripherals. The CoreAI offers ADC conversion controlled by CoreMP7 and an APB slave interface with 8- or 16-bit width and 14 maskable interrupt sources. Further, an internal clock divider in CoreAI generates an Analog Configuration Mux clock, and an optional-read FIFO stores up to 256 ADC conversions.
Simplifying the assembly of IP cores within M7AFS designs, the free CoreConsole 1.1 IDP allows users to focus on the system rather than individual components, resulting in significant reductions of time and cost in overall development. In addition, CoreConsole 1.1 provides access to CoreAI through an integrated "IP Vault" as well as to Actel's entire DirectCore IP library, full AHB multi-master support, software driver export and memory map generation, and free CoreMP7 subsystem IP block updates.
Also available for free, Libero 7.1 IDE Gold allows users to instantly begin implementing ARM7-enabled, mixed-signal FPGA designs up to one million system gates. Optimizations to Libero 7.1 include design support for the first device in the M7AFS family, the M7AFS600. Additionally, the SmartGen core generator tool within the Libero IDE enables the configuration of the analog capabilities of M7AFS devices accessible through CoreAI.
About ARM7-Enabled Fusion PSCs
Representing the definitive, single-chip PSC platform, the ARM7-enabled Actel Fusion devices satisfy a demand from system architects for a solution that simplifies design and unleashes their creativity for the development of feature-rich embedded systems. Bridging the industry-standard ARM7 technology with the industry's first mixed-signal FPGA family, the ARM7-enabled Actel Fusion PSC presents new capabilities for system development by allowing designers to integrate a wide range of functionality into a single device, including support for +/-12V analog I/O, up to 8Mbits of embedded flash memory, integrated ADC and up to 1.5M system gates of programmable logic fabric. Further, Actel's M7AFS Fusion PSCs extend the core benefits of the company's flash FPGA technology -- live at power-up (LAPU), low power, practical firm-error immunity and security.
Pricing and Availability
Actel's Core AI will be available for free in April. Also free, the CoreConsole 1.1 IDP and Libero 7.1 IDE Gold will be available in April for download via Actel's Web site. A Platinum edition of Libero 7.1 IDE is available for $2495. All editions are one-year renewable licenses.
The M7AFS family includes four devices of varying gate densities, levels of embedded flash and analog channels. Samples of the M7AFS600 device will be available in April, with the M7AFS1500 sampling in 2H 2006. Implementation of CoreMP7 in Actel's ARM7-enabled Fusion devices starts below $5 in 250K-unit volumes.
For further information about pricing and availability, please contact Actel or visit the company's Web site at www.actel.com.
Actel Corporation is the leader in single-chip FPGA solutions. The company is traded on the NASDAQ National Market under the symbol ACTL and is headquartered at 2061 Stierlin Court, Mountain View, Calif., 94043-4655. For more information about Actel, visit www.actel.com. Telephone: 888-99-ACTEL (992-2835).