Mike Clendenin, EE Times(03/06/2006 9:00 AM EST)
After visiting about 60 companies during his first year as CEO of ARC International, Carl Schlachte was fascinated by the large number that had licensed ARC's configurable architecture and then spent time paring it to the bare necessities.
"Configurability for these companies was all about taking things away," he said. "Even when they added custom extensions and changed the instruction set, it was really with an eye toward removing things, like the need for extra clock speed or some of the on-chip memory."
Engineers were trying to create a device that was optimally suited for the application they had in mind. That jibed with the former chip designer's belief that there are no free transistors--not even in the 90-nanometer era. And that thought is at the heart of ARC's new configurable video offering.
These days Schlachte is busy rallying support for ARC Video, a 260,000-gate platform based on an ARC 700 family core that is coupled with the company's single-instruction, multiple-data (SIMD) accelerator and DMA engine. The SIMD accelerator was developed to exploit the data parallelism inherent in media applications, with a single instruction able to compute up to eight separate 16-bit video pixels simultaneously through the use of a 128-bit-wide data path. Supported codecs include H.264, VC-1, MPEG-4 and MPEG-2, as well as numerous image files.
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