Multicore design strives for balance... but programming, debug tools complicate adoption

Richard Goering, EE Times
(03/27/2006 9:00 AM EST)
URL: http://www.eetimes.com/showArticle.jhtml?articleID=183702690
 

Santa Clara, Calif. -- The consensus from last week's Multicore Expo here was clear: Putting more than one core on a chip is the best way to elevate performance while keeping power under control. But the advantages of multicore architectures will be lost unless new approaches are developed for programming and debugging multicore systems, conference participants warned.

Programming is tough enough for today's multicore systems, which are often two- or four-core homogeneous systems using symmetric multiprocessing (SMP). The wave of the future, many observers believe, is heterogeneous multicore ICs that may contain a mix of general-purpose processors, coprocessors and DSPs, along with different operating systems.