Kaben Developing Second Generation Synthesizer IP

Enables new levels of integration and performance for multi-standard single chip ICs

Ottawa, ON – April 3, 2006 – Kaben Research Inc., a leading developer of mixed-signal, Intellectual Property (IP) blocks for Wireless, System-on-a-Chip (SoC) manufacturers, announced today that it is developing a Second Generation Delta-Sigma Synthesizer architecture. The new design is based on proprietary Delta-Sigma Phase Detector technology.

Current Delta-Sigma synthesizers require that SoC designers trade-off the loop filter bandwidth for speed vs total phase noise (synthesizer in-band phase noise, VCO phase noise, and Delta-Sigma quantization noise). Typically, while Delta-Sigma synthesizer architectures improve the close-in phase noise, they generate a high out-of-band quantization noise that limits loop filter bandwidth or requires extra parasitic poles increasing the off-chip component and pin count. Having an off-chip loop filter dictates that the synthesizer must be near the edge of the chip which is considered prime real estate and a constant battle when floor planning the SoC. The issue is further compounded by off-chip components contributing to the out-of-band phase noise of the synthesizer.

Kaben's Second Generation Synthesizer IP significantly reduces the traditional quantization noise associated with Delta-Sigma synthesizers and the programmable digital loop filter is entirely on chip.

Out-of-band quantization noise is significantly reduced in the Second Generation Synthesizer IP through Kaben's proprietary Delta-Sigma Phase Detector which enables advanced digital filtering techniques. As there is less quantization noise to suppress, the loop filter can be made wider thus improving switching speed and providing higher VCO noise suppression.

The digital loop filter is integrated on-chip eliminating the associated pins and component count. The elimination of pins means that the placement of the synthesizer on the die is no longer limited to the edges which is advantageous in today's pad limited SoCs. Further, the digital loop filter can be programmed on the fly. This provides the flexibility of creating one loop filter bandwidth that enables extremely fast acquisition times until the loop is locked, then without glitches, switch to a filter designed for optimum phase noise. Additionally, on-chip filters enable multi-standard, multi-band, and multi-VCO architectures.

Describing the benefits of Kaben's Second Generation Synthesizer IP to SoC manufacturers, Kaben VP of Marketing, Seste Dell'Aera said, “This is a major development in wireless SoC evolution." He continued, "The reduction in quantization noise and the on-chip programmable loop filter means that this technology will enable new levels of integration and performance for multi-standard single chip ICs."

About Kaben
Kaben Research is an IP company focused on design, development, and licensing of mixed-signal building blocks that are key to creating future SoC products. The company delivers high-performance, proven IP blocks to SoC manufacturers in the wireless communications market that significantly reduce risk, cost, and time to market. Kaben's IP product offering includes: Frequency Synthesizers, Sampling IF Filters, D/A Converters, and Programmable Clock Generators. For more information, please visit our Web site at www.kabenresearch.com.