High precision ring oscillator within +/-2% of the specified 22.1184M frequency - 0.18um EF
eASIC Names Kaushik Banerjee Vice President of Engineering
Mr. Banerjee has extensive management experience in the areas of chip and system architectures from definition through product rollout. He has proven success in building and managing multiple Design Centers and design teams in US and globally. Prior to joining eASIC, Mr. Banerjee served as Vice President of System-on-Chip (SOC) R&D at Marvell Semiconductor’s Communications and Consumer Business group, where he managed hardware, software and system development teams in various product areas globally. Previously, he worked as Vice President of High-end WAN/LAN Business Unit and US Design Centers at Fujitsu Microelectronics, managing business operations, defining ASIC strategy and interfacing with tier-one customers. Before Fujitsu, Mr. Banerjee was Vice President of Systems Engineering at Innovacom and also founded Silicon Crafters, a start-up providing design services and ASIC development consulting. Earlier in his career, Mr. Banerjee worked as ASIC designer and FAE in numerous companies including: Compass Design Automation/VLSI, Viewlogic Systems, Zycad and National Semiconductor. He holds MSEE (Semiconductor Electronics) from Cornell University and BSEE with Honors from Pratt University.
"I’m very pleased to have Kaushik join our management team,” said Ronnie Vasishta, eASIC’s Chief Executive Officer. “His proven success in building and leading engineering teams and global design organizations will help eASIC execute its product development strategy and achieve aggressive growth plans. His role is critical nowadays as the evolving Programmable ASIC domain is in the process of identifying the winning solution for this market. The increasing requirements to customize the design in hardware amid a huge cost of existing ASIC/FPGA solutions, drive the need for a disruptive technology such as eASIC’s that can provide affordable mass customization for high performance applications”.
“I’m very excited to join eASIC and lead the engineering team to deliver NRE-free Programmable ASIC products to the marketplace,” said Kaushik Banerjee. “eASIC’s innovative customization approach is poised to revolutionize the ASIC arena and fuel the industry growth by allowing increased number of designs. I look forward to leading eASIC’s products into the mainstream ASIC design.”
About eASIC
eASIC offers breakthrough Programmable ASIC products including Configurable Logic IP, aimed at dramatically reducing the overall fabrication cost and time of customized high-performance semiconductor chips. Its patented architecture enables rapid and low-cost ASIC and SoC (System-on-Chip) designs through innovative use of programmable logic technology coupled with single Via-layer customizable routing. With just one Via layer to customize, Direct-write e-Beam processing becomes possible at 10x the pace, thereby enabling eASIC to offer NRE-free Programmable ASIC devices. eASIC’s technology has been successfully proven in silicon and validated by world-class semiconductor vendors.
Founded in 1999, eASIC Corporation is a privately held company, headquartered in Santa Clara, California. Investors include Vinod Khosla, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, and Evergreen Partners.
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