CAMPBELL - May 11, 2006 - Silicon Interfaces, a high-end design services and leading provider for IP’s in Europe, North America and Asia-Pacific, under their IP Development Program - Silicon Cores: Core to the Intelligent Systems™, today announced the availability of Gigabit Ethernet MAC OVA Checker VIP, intellectual property. The SI80GEOVA10, Gigabit Ethernet MAC OVA Checker VIP increases the portfolio of Silicon Interfaces Verification IP’s.
Silicon Interfaces’ Gigabit Ethernet MAC OVA Checker VIP is fully documented, off the shelf component for the Developers of the Gigabit Ethernet MAC OVA Checker VIP.
This VIP checker is developed using the abstract capabilities of OVA, that are used in dynamic simulation of Gigabit Ethernet MAC based design.
The VIP checker provides a fast, accurate way to simplify and speed-up the device verification task in a complex design process, verification can take up to 70% of the development time.
Gigabit Ethernet MAC OVA Checker VIP speeds up the verification process providing a compelling cost and time to market. Open Vera and Open Vera Assertions (OVA) verification IP’s are reusable. It provides fast and accurate way to simplify and speed up the device verification task.
SI80GEOVA10, Gigabit Ethernet MAC OVA Checker VIP Specifications
- The VIP can be adapted to test a standard Gigabit Ethernet MAC device in Synopsys Magellan Formal Verification environment
- Separate set of Checkers provided for Transmit as well as Receive sections
- Extensive checking of the PHY Interface for the MAC
SI80GEOVA10, Gigabit Ethernet MAC OVA Checker VIP Features
- Compliant with the Gigabit Ethernet MAC specifications IEEE 802.3
- Accurate verification of the Gigabit Ethernet MAC protocol
- The Checker VIP follows the OpenVera unified flow for formal tools
- The Checker VIP incorporates layered approach as specified by Synopsys
- Full programmability and versatility of the VIP allows connection to any standard Gigabit Ethernet MAC device
- The assertions are checked with the Generic Microcontroller Interface on Microcontroller side
- Support for Full–duplex Mode of operation
- Provides checking of valid Inter Packet Gap
- Support for checking of normal as well as VLAN tagged Packets
- Supports checking of Pause Frames
- Provides Checkers for Minimum and Maximum payload sizes, for both normal as well as VLAN tagged Packets
- Checkers to determine valid Preamble bits along with SFD
- Separate Configuration file for Parameter definitions
The SI80GEOVA10, Gigabit Ethernet MAC OVA Checker VIP Gigabit Ethernet MAC OVA Checker VIP can work in a standalone mode i.e. it can be plugged in any design verification environment, which uses the standard Protocol without disturbing the structure.
About Silicon Interfaces
Silicon Interfaces has experience in verification solutions and developing IP for Fabric Channel Interconnect, Telecom and Networking domains, including Bluetooth Baseband, 802.11 a/b/g MAC & Baseband, Gigabit Ethernet MAC, Sonet STS 1/3 Framer, 1394, USB2 Function Controller, USB On-the-Go, Infiniband, Rapid IO, 8530, 8051, 7990 and UART. Currently, our Roadmap IP’s are PCI-Express, 10 Giga and SONET STS Framer –12. The IP’s has had considerable maturity based on certification, targets to various FPGA devices and ASIC libraries, silicon area optimization, silicon prototyping and testing. Also available is OVA VIP’s and an extensive driver development program in order to offer a packaged solution to the customer.