2D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
Sequence, Ultima resolve legal dispute
Sequence, Ultima resolve legal dispute
By Richard Goering, EE Times
August 22, 2000 (8:22 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000822S0052
SANTA CLARA, Calif. A cross-licensing deal has resolved a legal dispute between Sequence Design Inc. and Ultima Interconnect Technology. The agreement calls for Ultima to license a previously disputed Sequence patent and for Sequence to resell Ultima's delay calculation tool. Last March, Sequence sued Ultima for alleged violation of a Sequence IC extraction patent, entitled "A system and method for extracting parasitic impedance from an integrated circuit layout." The patent was granted to Sequence, then named Frequency Technology, in May 1999. In the lawsuit, filed in the U.S. District Court of Northern California, Sequence asked for a jury trial, injunctive relief and unspecified damages. Ultima has now agreed to license the Sequence patent for use with its Nautilus product, a full-chip 3D extraction tool. As part of the agreement, Sequence will market Ultima's Millennium delay calculator bundled into its own IC design solution and will integrate Millennium into Sequence's timing-closure flows. Millennium is a full-chip analysis tool that computes cell and interconnect delays.
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