Aware, Inc. to Feature VDSL2 solutions at GlobalComm 2006
BEDFORD, MASS. – June 2, 2006 - At GlobalComm 2006 next week in Chicago, Aware, Inc. (NASDAQ: AWRE), a worldwide leader and innovator of broadband intellectual property, today announced that it will showcase several demonstrations featuring the latest VDSL2 and ADSL2+ technology in its booth (#16035) June 5 – 7, 2006. Highlights include Aware’s StratiPHY™ family of DSL intellectual property (IP), VDSL2 interoperability, an HDTV-over-VDSL2 demonstration using Deutsche Telekom VDSL2 profiles, as well as Aware’s StratiPHY-Bonded™ technology, and its Dr. DSL® advanced diagnostic software.
VDSL2 Interoperability Featuring StratiPHY3™
Aware will feature the first public demonstration of VDSL2 interoperability between independent chipsets at GlobalComm. By connecting a standard-compliant VDSL2 IP DSLAM to an Aware StratiPHY3™-based customer premises equipment (CPE) modem, we will demonstrate the ultra high-speed data rates necessary to deliver triple-play services such as HDTV. Aware’s StratiPHY3 supports up to 30MHz of bandwidth, all eight profiles, and regional bandplan configurations.
HD Video over VDSL2 Using Deutsche Telekom’s Chosen Profiles
Also in its booth, Aware will use its StratiPHY3 to stream multiple high-definition (HD) video feeds over VDSL2. This demo uses the same VDSL2 17a and 8b profiles selected to be deployed by Deutsche Telekom in its recently announced broadband initiative to upgrade its high-speed network to offer customers innovative broadband applications, including HDTV broadcasts of Germany's premier soccer league.
StratiPHY™ Silicon Product Platforms
Aware’s StratiPHY family, including StratiPHY2+™, which was recently licensed to PMC-Sierra, and StratiPHY3, offers complete central office (CO) and CPE IP platforms, supports ADSL, ADSL2/2+, and VDSL2 ITU standards, and is fully interoperable with all major DSL chipset providers. Aware’s StratiPHY-Bonded™, the newest edition to the StratiPHY family, is a complete ITU G.998.1 ADSL2+ bonded intellectual property offering which integrates Aware’s field-proven StratiPHY2+ ADSL2+ and ATM bonding logic into single package. In its booth, Aware will feature a live demonstration of its StratiPHY-Bonded solution interoperating with an industry-leading ADSL2+ DSLAM achieving 45 Mbps bonded rates.
Dr. DSL® Advanced Diagnostics Software
Another highlight of the Aware booth is its Dr. DSL CO and CPE diagnostics software. Dr. DSL CO's single-ended test technology (SELT) enables CO equipment to perform wideband testing without additional hardware. Dr. DSL CPE technology (DELT) enables an ADSL2/2+ modem to operate as a high-end test set, capable of performing service verification, trouble isolation, and ongoing monitoring.
Aware’s technology will be featured in its booth at GLOBALCOMM 2006 (#16035) from June 5 – 7, 2006 in Chicago. Aware will also have a booth at the Outside Plant Expo (#67030) co-located the same dates with GlobalComm at McCormick Place in Chicago. For more information on Aware or its technology please visit Aware’s website at www.aware.com.
About Aware
Aware, Inc. designs, develops, licenses and markets DSL technologies that enable broadband communications over existing telephone networks. Its solutions, including splitterless G.lite, full-rate ADSL, ADSL2, ADSL2+, VDSL2, Bonded ADSL2+, Dr. DSL®, StratiPHY™, StratiPHY-Bonded™, StratiPHY2+™, StratiPHY3™ and G.SHDSL, address central office as well as customer premise requirements. Aware is also a leading provider of standards-based biometric transaction and image compression software toolkits. More information can be found at www.aware.com.
|
Related News
- Aware Extends VDSL2 Interoperability Leadership at NXTcomm 2007
- Aware Announces Licensing Agreement with PMC-Sierra for VDSL2
- Aware, Inc. Reports Fourth Quarter and 2006 Financial Results
- Altera to Feature High-Performance Memory Interface and PCI Express Solutions at Denali MemCon 2006
- MemCon San Jose 2006 to Feature Windows Vista Symposium
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |