Approximately 70% increase in processing performance over previous Renesas Technology product, plus comprehensive range of peripheral functions and middleware, providing a single-chip solution for digital audio and industrial products
Tokyo, June 5, 2006 −− Renesas Technology Corp. today announced a total of five SH7263 and SH7203 high-performance microcontroller models with a 200 MHz maximum operating frequency, incorporating a SuperH™*1 Family SH2A-FPU CPU core and a Host interface supporting the USB (Universal Serial Bus) standard v2.0 High Speed specification. Sample shipments will begin in July 2006 in Japan.
These new products offer higher speed and enhanced functions compared with Renesas Technology's current 120 MHz operation SH7261, together with a wide variety of on-chip peripheral functions. With an on-chip CD-ROM decoder and sampling rate converter, the SH7263 is ideal for use in car audio, home audio, and suchlike digital audio systems, while the SH7203, with no on-chip audio oriented functions, is suitable for general consumer and industrial applications.
These new microcontrollers offer the following features.
|(1) ||Comprehensive peripheral functions including USB Host supporting High Speed specification, and display controller |
| ||On-chip peripheral functions of these microcontrollers additional to those of the current 120 MHz SH7261 are a USB standard v2.0 High Speed (480 Mbps) specification Host and Function interface, and a display controller supporting liquid crystal panels up to WVGA size (800 x 480 pixels). These features provide display system capability and enable low-cost configuration of a digital audio player that performs high-speed data transfer via connection of USB flash memory or a portable audio or suchlike USB device. |
Like the current SH7261, the SH7263 also incorporates an audio CD-ROM decoder and a sampling rate converter that converts the audio data sampling frequency, necessary for configuring a digital audio device, enabling product costs to be kept down. The SH7263 also includes a model with a combination of an SD memory card*2 interface and an IEBus*3 controller for control communications, while the lineup of five models, including an SH7203 model with no on-chip audio oriented functions, offers the user a selection of products suited to various applications, including car audio and audiovisual systems, as well as industrial devices.
|(2) ||Approximately 70% increase in processing performance over previous Renesas product |
| ||The SH2A-FPU CPU core used in these microcontrollers features the addition of an FPU (floating point number processing unit) to the excellent real-time control capabilities of the SH-2A CPU core. Operation at the maximum operating frequency of 200 MHz provides high processing power exemplified by integer operation performance of 480 MIPS (million instructions per second) (Dhrystone 1.1) and floating-point operation performance of 400 MFLOPS (mega floating point number operations per second), representing an approximately 70% increase in processing performance over the current 120 MHz SH7261 incorporating the same SH2A-FPU core. While only single-stream playback has been possible with previous products in MP3 and similar digital audio signal processing, these new microcontrollers can also support high-end digital audio devices, with the capability of simultaneously executing multi-stream playback and encoding processing of various audio formats, including AAC (Advanced Audio Coding). |
|(3) ||Software solutions provided by a variety of middleware |
| ||Middleware compatible with various audio formats is available, including MP3, WMA, and AAC. The high processing performance of these microcontrollers enables multi-CODEC compatibility to be implemented by software alone, and also allows support for DRM (Digital Rights Management) necessary for audio content protection processing through music distribution. |
Fields such as car audio and home audio are witnessing increasing popularity of high-added-value products equipped with audio data playback functions compatible with various audio formats, such as MP3, functions for recording audio CD music data on an HDD (hard disk drive) in compressed form, and so forth. In line with this trend, devices equipped with audio data compression/expansion functions are becoming more widespread, but digital audio processing has up to now been performed by expensive DSPs, dedicated LSIs, and the like. However, in order to further lower the cost of user products, there is a strong demand for a reduction in the number of component parts by incorporating digital audio processing functions in the microcontrollers hitherto used for system control.
At the same time, portable audio players have rapidly become widely popular, and built-in functions for connection between car audio or stationary audio systems and portable audio players are becoming increasingly common.
Renesas Technology earlier released the SH7261 with a 32-bit SH2A-FPU CPU core, featuring excellent real-time processing performance, as a digital audio solution for car audio and home audio systems, and this product has helped to reduce the cost of digital audio devices.
Now, in response to the market need for portable audio player connectivity, Renesas has developed the SH7263 and SH7203 high-performance single-chip microcontrollers incorporating a Host function supporting the USB standard v2.0 High Speed specification.
The SH7263 and SH7203 incorporate a high-performance SH2A-FPU CPU core with a built-in FPU, and operate at a maximum frequency of 200 MHz. Operation at the maximum operating frequency of 200 MHz provides high-speed processing power of 480 MIPS and 400 MFLOPS, representing an approximately 70% increase in signal processing performance over the current 120 MHz SH7261 incorporating the same SH2A-FPU core.
The SH2A-FPU instruction set is upward-compatible with those of the SH-2A and SH-2 CPU cores, allowing the use of programs developed for existing products. At the same time, ROM code efficiency has been improved by approximately 75% compared with the SH-2, an improvement that makes it possible to reduce program size by approximately 25%.
This high signal processing performance and ROM code efficiency enable MP3, WMA, AAC, and suchlike voice data compression/expansion processing to be executed at a lower frequency and by a smaller program. As a result, system control and digital audio processing previously performed by separate devices can be handled by a single chip, enabling fewer component parts to be used. This makes it possible to implement a low-power-consumption system at low cost.
These microcontrollers also incorporate a variety of interfaces and peripheral functions necessary for configuring a digital audio device, including a Host and Function interface supporting the USB standard v2.0 High Speed specification, and a display controller capable of bit-mapped display on liquid crystal panels up to WVGA size. These features enable low-cost configuration of a digital audio player that performs high-speed data transfer via connection of USB flash memory or a portable audio or suchlike USB device, for example, while possible uses of the display controller include menu display on the LCD screen of an audiovisual device.
Like the current SH7261, the SH7263 also incorporates such functions as an audio CD-ROM decoder, a serial sound interface (SSI) for input and output of digital audio data, a serial communication interface with a 16-stage FIFO, and an I2C bus*4 interface. Also included are a sampling rate converter that converts the audio data sampling frequency, and functions necessary for a digital audio device, which contribute to a significant reduction in system costs.
The SH7263 and SH7203 incorporate an external data bus expandable up to 32 bits, allowing direct connection to flash ROM, SDRAM, SRAM, and so forth, without the use of external parts.
Other on-chip functions include a 5-channel multifunction timer unit suitable for motor control, capable of 3-phase PWM wave output for AC motor control, as well as an 8-channel 10-bit A/D converter, 2-channel 8-bit D/A converter, 8-channel DMAC, CAN controller*5, and NAND flash controller. These varied peripheral functions enable the number of external parts to be reduced, and make it possible to create a high-performance system at lower cost.
The SH7263 includes a model with a combination of an SD memory card interface and an IEBus controller channel for control communications, offering a selection of models suited to various user system specifications.
The package used is a 240-pin QFP.
On-chip debugging functions*6 are also provided that enable real-time debugging to be carried out at the maximum operating frequency, and for the development environment, the USB bus-powered E10A-USB requiring no external power supply can be used as an emulator.
MP3, WMA, AAC, or similar voice compression standard compatible middleware enables a multi-CODEC-capable system to be implemented by software, while software including a CD-ROM ISO9660 file system and HDD FAT32 file system is also available, providing software solutions for digital audio product development.
Renesas Technology will continue to develop products offering higher speed, performance, and functionality in line with market needs, improving performance through the use of multiple CPUs, and implementing further peripheral function enhancements.
|Notes: ||1. ||SuperH is a trademark of Renesas Technology Corp. |
|2. ||SD memory card is a small memory card whose specification was originally formulated by 3C (Matsushita Electrical Industrial Co., Ltd., Toshiba Corporation, and SanDisk Corporation) and has been progressively extended by the SDA (SD Card Association). |
|3. ||IEBus (Inter Equipment Bus) is a trademark of NEC Electronics Corporation. |
|4. ||I2C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands. |
|5. ||CAN (Controller Area Network) is a network specification for use in vehicles, proposed by Robert Bosch GmbH of Germany. |
|6. ||On-chip debugging functions: Part of the debugging circuitry previously incorporated in an emulator. Providing these functions on-chip enables simple emulation to be carried out using an actual device during system evaluation. |
* Other product names, company names, or brands mentioned are the property of their respective owners.
- Car audio: Car CD players, HDD-equipped car audio systems, etc.
- Home audio: Network audio systems, HDD-equipped audio systems, etc.
- Industrial equipment: Sequencers, robots, etc.
Prices in Japan *For Reference
Maximum Operating Frequency (Operating Temperature Range )
Sample Price [ Tax Included ] (Yen)
|SH7263 ||R5S72630P200FP ||200 MHz (-40 to 85 ºC ) ||CD-ROM decoder, SRC ||[ 2,000 ] |
|R5S72631P200FP ||CD-ROM decoder, SRC SD memory card IF ||[ 2,100 ] |
|R5S72632P200FP ||CD-ROM decoder, SRC IEBus controller ||[ 2,100 ] |
|R5S72633P200FP ||CD-ROM decoder, SRC SD memory card IF |
|[ 2,200 ] |
|SH7203 ||R5S72030W200FP ||200 MHz (-20 to 85 ºC ) ||− ||[ 1,900 ] |
* An SD memory card license must be obtained in order to use the SD memory card interface.
|Product name ||SH7263 ||SH7203 |
|Type name ||R5S7263O |
|Power supply voltage ||3.3 V/1.2 V |
|Maximum operating frequency ||200 MHz |
|Maximum processing performance ||At 200 MHz operation: 480 MIPS [Dhrystone 1.1], 400 MFLOPS |
|Operating temperature range ||-40 to 85 ºC ||-20 to 85 ºC |
|CPU core ||SH2A-FPU |
|CPU instructions ||112 (including FPU-related instructions) |
|On-chip RAM ||80 Kbytes |
|Cache memory ||16 Kbytes (separate 8K instructions/8K data, 4-way set associative type) |
|External memory ||Bus clock: Max. 66 MHz |
|SRAM and SDRAM directly connectable by bus state controller |
|Address space: 64 Mbytes x 8 |
|Data bus width: External 8/16/32 bits |
|On-chip peripheral functions ||Multifunction 16-bit timer (MTU2) x 5 channels |
|16-bit timer (CMT) x 2 channels |
|A/D converter (10-bit resolution) x 8 channels |
|D/A converter (8-bit resolution) x 2 channels |
|Selection of USB standard v2.0 High Speed specification compatible Host or Function interface |
|Serial communication interface with 16-stage FIFO (SCIF) x 4 channels (asynchronous and synchronous communication capability) |
|Synchronous serial interface (SSU) x 2 channels |
|I 2 C bus interface x 4 channels |
|Serial sound interface (SSI) x 4 channels |
|CAN controller (32-message buffer) x 2 channels |
|NAND flash interface |
|Display controller (LCDC) |
|Real-time clock (RTC) |
|CD-ROM decoder ||- |
|Sampling rate converter (SRC) ||- |
|- ||- ||IEBus controller ||IEBus controller ||- |
|- ||SD memory card IF ||- ||SD memory card IF ||- |
|User break controller (UBC) |
|On-chip debugging functions |
- Advanced user debugger-II (AUD-II)
- User debug interface (H-UDI)
|Direct memory access controller (DMAC) x 8 channels |
|Interrupt controller (INTC) |
|Watchdog timer (WDT) |
|Clock pulse generator (CPG): Built-in PLL, max. 16 x multiplication |
|Power-down modes ||Sleep mode |
|Software standby mode |
|Deep standby mode |
|Module standby mode |
|Package ||240-pin QFP (32 mm x 32 mm) |