Lexra Announces Architecture for 8-Channel Voice over Internet Protocol (VoIP) Using LX5280 RISC DSP
A new study demonstrates the feasibility of dramatic cost reduction by combining control and signal processing functions
San Jose, CA (August 15, 2000) - Lexra, a leading developer of processor cores for embedded applications, announced the results of a Voice over Internet Protocol (VoIP) system analysis for its LX5280 RISC DSP System. Lexra's analysis technique shows how a real-time operating system (RTOS) can effectively manage eight to twelve universal port VoIP channels per processor along with various background RISC tasks, depending on the memory hierarchy.
Driven by the explosive growth of IP services and the continued arbitrage opportunity, the worldwide voice-over-packet services market will grow to $87 billion by 2004, according to Dataquest Inc., a unit of Gartner Group, Inc. The dynamic growth is fueling demand for VoIP switching equipment to provide more cost-effective silicon solutions. Lexra's analysis demonstrates that a single chip combining both RISC CPU and DSP processor can effectively achieve this solution.
"VoIP System architects are faced with determining if an architecture meets their SOC needs during the product planning and evaluation phase," stated Sam Rosen, principal DSP architect at Lexra. "This set of tools increases their confidence that the LX5280 can meet their system needs early on."
The analysis technique includes detailed algorithmic analysis of the G.723.1, G.729a, G.711 and G.726 line codecs, line echo cancellation, Dual Tone Multi-Frequency (DTMF) detection and generation, packet processing tasks and RTOS tasks. Each task is characterized with instruction and data memory usage, processing time and task priority. The entire system is analyzed for sufficient resources and each task meeting its deadline.
Lexra's single LX5280 RISC DSP processor is capable of performing the task of both an independent RISC processor and DSP processor. For embedded processor systems, this results in a smaller die size with less processor interconnect, and therefore lowers product cost and power consumption. It also allows software developers to use the same tool chain for both the control oriented tasks, and DSP tasks, reducing product complexity and shortening time-to-market.
Assuming an ideal memory hierarchy, 12 universal port VoIP channels can run on an LX5280 processor requiring 90 percent (180 MHz) of CPU cycles, assuming the processor is run at 200 MHz. A lower cost, 8-channel system requires 75 percent (150 MHz) of the CPU using 16 Kbytes of instruction RAM, 8 Kbytes of Data RAM, less than 2 Kbytes of instruction and data caches, and a bus speed of 50 MHz instead of 100MHz.
Pricing & Availability
The LX5280 RISC-DSP RTL core is currently available. License fees start at $495,000 plus a unit royalty of $1.95 per chip. The RTL core includes the Verilog database, synthesis scripts and a regression suite. The SmoothCore[tm] version of the LX5280 is also currently available for the TSMC 0.18-micron process.
A presentation extrapolating the results for two sample systems is available free of charge on the Lexra Web site at the following URL: http://www.lexra.com/testdrive.html.
About Lexra, Inc.
Lexra, Inc. is a leading microprocessor developer specializing in RISC and DSP cores for the embedded market. In addition to competitive performance, small die size and low power consumption, Lexra's processor cores are also easy to use, easy to port and provide customers with cost effective solutions. Lexra is headquartered in San Jose, CA. Further information can be found at http://www.lexra.com.
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