Tarek Established Japan Distribution Channel with Applistar
PCIE-VR supports all the PCI Express standards, 1.0a, 1.1, and the coming Gen2. All PCIE designs, such as root complex, switches, end points, and bridges, are supported at both Register-Transfer Level (RTL) and Electronic System Level (ESL). To integrate a PCIE design, PCIE-VR uses standard interfaces, such as serial, PIPE, 8/10b, and parallel. A compliance test suite that implements the PCIE compliance checklist from PCI-SIG is also included.
Tarek's PCIE-VR not only fully models and monitors PCI Express functionality, timing, and protocols but also generates realistic sophisticated concurrent-test scenarios automatically in all the three layers. For the transaction layer verification, PCIE-VR features a multi-threaded traffic generator that greatly simplifies the verification of concurrent access to the designs. For the data link and physical layers, PCIE-VR features powerful randomized state transition loop mechanisms that exhaustively verify the flow control protocol, DLCMSM, and LTSSM.
About Tarek
Tarek Verification Systems was founded in 2004. It researches and develops test case automation solutions and highly automated verification IPs for repeatable on-time first-silicon success and significantly shorter time to market. Tarek\'s innovative technology enables verification engineers as well as designers to create quality and sophisticated tests automatically. For more information, please visit www.tarek.com.
About Applistar
Applistar Corporation was founded in 2001 by industry veterans in ASIC design and EDA field. Applistar provides ASIC design solutions in Japan. For more information, please visit www.applistar.com.
|
Related News
- Tarek Established Distributor Channel with DSM Silicon Solutions
- Codasip Expands its Global Reach by Signing Channel Partnerships throughout Asia
- DarbeeVision Enters Into Channel Partnerships in Taiwan, Japan and Korea
- LogicVision Establishes Distribution Channel in Taiwan with Avant Technology Inc.
- eASIC and INNOTECH Form Strategic Partnership for Distribution of Programmable ASIC Products in Japan
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |